<?xml version="1.0"?>
<feed xmlns="http://www.w3.org/2005/Atom" xml:lang="en">
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	<title>15h.org - User contributions [en]</title>
	<link rel="self" type="application/atom+xml" href="https://15h.org/api.php?action=feedcontributions&amp;feedformat=atom&amp;user=Mrothfuss"/>
	<link rel="alternate" type="text/html" href="https://15h.org/index.php/Special:Contributions/Mrothfuss"/>
	<updated>2026-07-28T00:13:23Z</updated>
	<subtitle>User contributions</subtitle>
	<generator>MediaWiki 1.43.8</generator>
	<entry>
		<id>https://15h.org/index.php?title=AGESA_15h&amp;diff=2939</id>
		<title>AGESA 15h</title>
		<link rel="alternate" type="text/html" href="https://15h.org/index.php?title=AGESA_15h&amp;diff=2939"/>
		<updated>2026-07-08T21:16:53Z</updated>

		<summary type="html">&lt;p&gt;Mrothfuss: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;This page provides technical details for AMD&#039;s &amp;quot;Orochi&amp;quot; open source AGESA for [[Family 15h#Overview|Bulldozer and Piledriver]] CPUs.&lt;br /&gt;
&lt;br /&gt;
== Debugging ==&lt;br /&gt;
To enable debugging, the following make menuconfig options are recommended:&lt;br /&gt;
* Chipset &amp;gt; Enable AGESA Debugging = ON&lt;br /&gt;
* Chipset &amp;gt; Debug AGESA Config = ON&lt;br /&gt;
* Chipset &amp;gt; Debug AGESA CPU Code = ON&lt;br /&gt;
* Chipset &amp;gt; Debug AGESA HT Code = ON&lt;br /&gt;
* Chipset &amp;gt; Debug AGESA MEM Status = ON&lt;br /&gt;
* Chipset &amp;gt; Debug AGESA MEM Flow = ON&lt;br /&gt;
* Chipset &amp;gt; Debug AGESA MEM Registers = OFF&lt;br /&gt;
* Chipset &amp;gt; Debug AGESA S3 Code = OFF&lt;br /&gt;
* Console &amp;gt; Default console log level = 7 (DEBUG)&lt;br /&gt;
&lt;br /&gt;
The availability of debugging methods will vary by motherboard. Using the COM1 port is most ideal if supported. Every device supports [[EHCI Debugging|EHCI debugging]], but this method can be slower and quirky.&lt;br /&gt;
&lt;br /&gt;
== DDR3 Support ==&lt;br /&gt;
The vast majority of UDIMM, RDIMM, and LRDIMM DDR3 modules are expected to work without issue. So far only [[AGESA_15h#Incompatible_DDR3_Modules|one]] module has been found to be incompatible with the AGESA. The maximum RAM supported is 256 GB per CPU socket. RDIMM modules are recommended for motherboards that support them. The following is an incomplete list of tested modules. Review the deployed systems list for well tested hardware configurations.&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!-- Keep this table sorted by&lt;br /&gt;
1, Brand (A to Z)&lt;br /&gt;
2, ECC (No, Yes)&lt;br /&gt;
3, Type (DIMM, UDIMM, RDIMM, LRDIMM)&lt;br /&gt;
4, Capacity (Low to High)&lt;br /&gt;
5, Speed (Low to High) --&amp;gt;&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
|+&lt;br /&gt;
!Product&lt;br /&gt;
!ECC&lt;br /&gt;
!Type&lt;br /&gt;
!Capacity&lt;br /&gt;
!Speed&lt;br /&gt;
!Tester&lt;br /&gt;
|-&lt;br /&gt;
|Actica ACT4GHU72D8H1333S&lt;br /&gt;
|Yes&lt;br /&gt;
|UDIMM&lt;br /&gt;
|4 GB&lt;br /&gt;
|1333 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Actica ACT8GHR72Q4H1600S&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|8 GB&lt;br /&gt;
|1600 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|ASint SLA302G08-GGNHC&lt;br /&gt;
|No&lt;br /&gt;
|UDIMM&lt;br /&gt;
|4 GB&lt;br /&gt;
|1600 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|ELPIDA EBJ81RF4BDWD-DJ-F&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|8 GB&lt;br /&gt;
|1333 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Corsair TR3X6G1333C9&lt;br /&gt;
|No&lt;br /&gt;
|UDIMM&lt;br /&gt;
|2 GB&lt;br /&gt;
|1333 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Crucial CT16G3ERSLD4160B&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|16 GB&lt;br /&gt;
|1600 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Crucial CT32G3ELSDQ4186D&lt;br /&gt;
|Yes&lt;br /&gt;
|LRDIMM&lt;br /&gt;
|32 GB&lt;br /&gt;
|1866 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Hynix HMT42GR7AFR4A-PB&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|16 GB&lt;br /&gt;
|1600 MHz&lt;br /&gt;
|pkubaj&lt;br /&gt;
|-&lt;br /&gt;
|Hynix HMT84GL7MMR4A-H9&lt;br /&gt;
|Yes&lt;br /&gt;
|LRDIMM&lt;br /&gt;
|32 GB&lt;br /&gt;
|1333 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Kingston KVR13N9S8/4&lt;br /&gt;
|No&lt;br /&gt;
|UDIMM&lt;br /&gt;
|4 GB&lt;br /&gt;
|1333 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Kingston KVR16E11/8I&lt;br /&gt;
|Yes&lt;br /&gt;
|UDIMM&lt;br /&gt;
|8 GB&lt;br /&gt;
|1600 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Kingston KVR1333D3D4R9S/4G&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|4 GB&lt;br /&gt;
|1333 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Kingston KVR16R11D4K4/32I&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|8 GB&lt;br /&gt;
|1600 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Micron MT36KSF2G72PZ-1G4E1&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|16 GB&lt;br /&gt;
|1333 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Micron MT36KSF2G72PZ-1G6E1FE&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|16 GB&lt;br /&gt;
|1600 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Micron MT36KSF2G72PZ-1G6N1KF&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|16 GB&lt;br /&gt;
|1600 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Nanya NT4GC64B8HG0NF-DI&lt;br /&gt;
|No&lt;br /&gt;
|UDIMM&lt;br /&gt;
|4 GB&lt;br /&gt;
|1600 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Samsung M393B1K70DH0-YH9&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|8 GB&lt;br /&gt;
|1333 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Samsung M393B1G70QH0-YK0&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|8 GB&lt;br /&gt;
|1600 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Samsung M393B2K70DM0-YF8&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|16 GB&lt;br /&gt;
|1066 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Samsung M393B2G70BH0-CK0&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|16 GB&lt;br /&gt;
|1600 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Samsung M393B4G70BM0-YH9&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|32 GB&lt;br /&gt;
|1333 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Samsung M393B4G70DM0-YH9&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|32 GB&lt;br /&gt;
|1333 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Samsung M386B4G70DM0-CMA&lt;br /&gt;
|Yes&lt;br /&gt;
|LRDIMM&lt;br /&gt;
|32 GB&lt;br /&gt;
|1866 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Samsung M386B4G70DM0-YK04&lt;br /&gt;
|Yes&lt;br /&gt;
|LRDIMM&lt;br /&gt;
|32 GB&lt;br /&gt;
|1600 MHz&lt;br /&gt;
|[[User:Sbrudenell|sbrudenell]]&lt;br /&gt;
|-&lt;br /&gt;
|Samsung M386B8G70DE0-YH93&lt;br /&gt;
|Yes&lt;br /&gt;
|LRDIMM&lt;br /&gt;
|64 GB&lt;br /&gt;
|1333 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Super Talent W1333UB4GS&lt;br /&gt;
|No&lt;br /&gt;
|UDIMM&lt;br /&gt;
|4 GB&lt;br /&gt;
|1333 MHz&lt;br /&gt;
|[[User:Frantic|frantic]]&lt;br /&gt;
|-&lt;br /&gt;
|Super Talent W1333EB4GS&lt;br /&gt;
|Yes&lt;br /&gt;
|UDIMM&lt;br /&gt;
|4 GB&lt;br /&gt;
|1333 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Super Talent W16RB8G4S&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|8 GB&lt;br /&gt;
|1600 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Super Talent W13RC16G4H&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|16 GB&lt;br /&gt;
|1333 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
=== Incompatible DDR3 Modules ===&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!-- Keep this table sorted by&lt;br /&gt;
1, Brand (A to Z)&lt;br /&gt;
2, ECC (No, Yes)&lt;br /&gt;
3, Type (DIMM, UDIMM, RDIMM, LRDIMM)&lt;br /&gt;
4, Capacity (Low to High)&lt;br /&gt;
5, Speed (Low to High) --&amp;gt;&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
|+&lt;br /&gt;
!Product&lt;br /&gt;
!ECC&lt;br /&gt;
!Type&lt;br /&gt;
!Capacity&lt;br /&gt;
!Speed&lt;br /&gt;
!Tester&lt;br /&gt;
!Remarks&lt;br /&gt;
|-&lt;br /&gt;
|OWC OWC1333D3MPE16G&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|16 GB&lt;br /&gt;
|1333 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|Designed for Apple Machines. SPD Data was incomplete.&lt;br /&gt;
|}&lt;/div&gt;</summary>
		<author><name>Mrothfuss</name></author>
	</entry>
	<entry>
		<id>https://15h.org/index.php?title=AGESA_15h&amp;diff=2938</id>
		<title>AGESA 15h</title>
		<link rel="alternate" type="text/html" href="https://15h.org/index.php?title=AGESA_15h&amp;diff=2938"/>
		<updated>2026-07-08T21:15:50Z</updated>

		<summary type="html">&lt;p&gt;Mrothfuss: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;This page provides technical details for AMD&#039;s [[AMD_Codenames#OR,_Orochi|Orochi]] open source AGESA for [[Family 15h#Overview|Bulldozer and Piledriver]] CPUs.&lt;br /&gt;
&lt;br /&gt;
== Debugging ==&lt;br /&gt;
To enable debugging, the following make menuconfig options are recommended:&lt;br /&gt;
* Chipset &amp;gt; Enable AGESA Debugging = ON&lt;br /&gt;
* Chipset &amp;gt; Debug AGESA Config = ON&lt;br /&gt;
* Chipset &amp;gt; Debug AGESA CPU Code = ON&lt;br /&gt;
* Chipset &amp;gt; Debug AGESA HT Code = ON&lt;br /&gt;
* Chipset &amp;gt; Debug AGESA MEM Status = ON&lt;br /&gt;
* Chipset &amp;gt; Debug AGESA MEM Flow = ON&lt;br /&gt;
* Chipset &amp;gt; Debug AGESA MEM Registers = OFF&lt;br /&gt;
* Chipset &amp;gt; Debug AGESA S3 Code = OFF&lt;br /&gt;
* Console &amp;gt; Default console log level = 7 (DEBUG)&lt;br /&gt;
&lt;br /&gt;
The availability of debugging methods will vary by motherboard. Using the COM1 port is most ideal if supported. Every device supports [[EHCI Debugging|EHCI debugging]], but this method can be slower and quirky.&lt;br /&gt;
&lt;br /&gt;
== DDR3 Support ==&lt;br /&gt;
The vast majority of UDIMM, RDIMM, and LRDIMM DDR3 modules are expected to work without issue. So far only [[AGESA_15h#Incompatible_DDR3_Modules|one]] module has been found to be incompatible with the AGESA. The maximum RAM supported is 256 GB per CPU socket. RDIMM modules are recommended for motherboards that support them. The following is an incomplete list of tested modules. Review the deployed systems list for well tested hardware configurations.&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!-- Keep this table sorted by&lt;br /&gt;
1, Brand (A to Z)&lt;br /&gt;
2, ECC (No, Yes)&lt;br /&gt;
3, Type (DIMM, UDIMM, RDIMM, LRDIMM)&lt;br /&gt;
4, Capacity (Low to High)&lt;br /&gt;
5, Speed (Low to High) --&amp;gt;&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
|+&lt;br /&gt;
!Product&lt;br /&gt;
!ECC&lt;br /&gt;
!Type&lt;br /&gt;
!Capacity&lt;br /&gt;
!Speed&lt;br /&gt;
!Tester&lt;br /&gt;
|-&lt;br /&gt;
|Actica ACT4GHU72D8H1333S&lt;br /&gt;
|Yes&lt;br /&gt;
|UDIMM&lt;br /&gt;
|4 GB&lt;br /&gt;
|1333 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Actica ACT8GHR72Q4H1600S&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|8 GB&lt;br /&gt;
|1600 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|ASint SLA302G08-GGNHC&lt;br /&gt;
|No&lt;br /&gt;
|UDIMM&lt;br /&gt;
|4 GB&lt;br /&gt;
|1600 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|ELPIDA EBJ81RF4BDWD-DJ-F&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|8 GB&lt;br /&gt;
|1333 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Corsair TR3X6G1333C9&lt;br /&gt;
|No&lt;br /&gt;
|UDIMM&lt;br /&gt;
|2 GB&lt;br /&gt;
|1333 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Crucial CT16G3ERSLD4160B&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|16 GB&lt;br /&gt;
|1600 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Crucial CT32G3ELSDQ4186D&lt;br /&gt;
|Yes&lt;br /&gt;
|LRDIMM&lt;br /&gt;
|32 GB&lt;br /&gt;
|1866 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Hynix HMT42GR7AFR4A-PB&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|16 GB&lt;br /&gt;
|1600 MHz&lt;br /&gt;
|pkubaj&lt;br /&gt;
|-&lt;br /&gt;
|Hynix HMT84GL7MMR4A-H9&lt;br /&gt;
|Yes&lt;br /&gt;
|LRDIMM&lt;br /&gt;
|32 GB&lt;br /&gt;
|1333 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Kingston KVR13N9S8/4&lt;br /&gt;
|No&lt;br /&gt;
|UDIMM&lt;br /&gt;
|4 GB&lt;br /&gt;
|1333 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Kingston KVR16E11/8I&lt;br /&gt;
|Yes&lt;br /&gt;
|UDIMM&lt;br /&gt;
|8 GB&lt;br /&gt;
|1600 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Kingston KVR1333D3D4R9S/4G&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|4 GB&lt;br /&gt;
|1333 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Kingston KVR16R11D4K4/32I&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|8 GB&lt;br /&gt;
|1600 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Micron MT36KSF2G72PZ-1G4E1&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|16 GB&lt;br /&gt;
|1333 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Micron MT36KSF2G72PZ-1G6E1FE&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|16 GB&lt;br /&gt;
|1600 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Micron MT36KSF2G72PZ-1G6N1KF&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|16 GB&lt;br /&gt;
|1600 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Nanya NT4GC64B8HG0NF-DI&lt;br /&gt;
|No&lt;br /&gt;
|UDIMM&lt;br /&gt;
|4 GB&lt;br /&gt;
|1600 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Samsung M393B1K70DH0-YH9&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|8 GB&lt;br /&gt;
|1333 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Samsung M393B1G70QH0-YK0&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|8 GB&lt;br /&gt;
|1600 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Samsung M393B2K70DM0-YF8&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|16 GB&lt;br /&gt;
|1066 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Samsung M393B2G70BH0-CK0&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|16 GB&lt;br /&gt;
|1600 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Samsung M393B4G70BM0-YH9&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|32 GB&lt;br /&gt;
|1333 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Samsung M393B4G70DM0-YH9&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|32 GB&lt;br /&gt;
|1333 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Samsung M386B4G70DM0-CMA&lt;br /&gt;
|Yes&lt;br /&gt;
|LRDIMM&lt;br /&gt;
|32 GB&lt;br /&gt;
|1866 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Samsung M386B4G70DM0-YK04&lt;br /&gt;
|Yes&lt;br /&gt;
|LRDIMM&lt;br /&gt;
|32 GB&lt;br /&gt;
|1600 MHz&lt;br /&gt;
|[[User:Sbrudenell|sbrudenell]]&lt;br /&gt;
|-&lt;br /&gt;
|Samsung M386B8G70DE0-YH93&lt;br /&gt;
|Yes&lt;br /&gt;
|LRDIMM&lt;br /&gt;
|64 GB&lt;br /&gt;
|1333 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Super Talent W1333UB4GS&lt;br /&gt;
|No&lt;br /&gt;
|UDIMM&lt;br /&gt;
|4 GB&lt;br /&gt;
|1333 MHz&lt;br /&gt;
|[[User:Frantic|frantic]]&lt;br /&gt;
|-&lt;br /&gt;
|Super Talent W1333EB4GS&lt;br /&gt;
|Yes&lt;br /&gt;
|UDIMM&lt;br /&gt;
|4 GB&lt;br /&gt;
|1333 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Super Talent W16RB8G4S&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|8 GB&lt;br /&gt;
|1600 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Super Talent W13RC16G4H&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|16 GB&lt;br /&gt;
|1333 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
=== Incompatible DDR3 Modules ===&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!-- Keep this table sorted by&lt;br /&gt;
1, Brand (A to Z)&lt;br /&gt;
2, ECC (No, Yes)&lt;br /&gt;
3, Type (DIMM, UDIMM, RDIMM, LRDIMM)&lt;br /&gt;
4, Capacity (Low to High)&lt;br /&gt;
5, Speed (Low to High) --&amp;gt;&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
|+&lt;br /&gt;
!Product&lt;br /&gt;
!ECC&lt;br /&gt;
!Type&lt;br /&gt;
!Capacity&lt;br /&gt;
!Speed&lt;br /&gt;
!Tester&lt;br /&gt;
!Remarks&lt;br /&gt;
|-&lt;br /&gt;
|OWC OWC1333D3MPE16G&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|16 GB&lt;br /&gt;
|1333 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|Designed for Apple Machines. SPD Data was incomplete.&lt;br /&gt;
|}&lt;/div&gt;</summary>
		<author><name>Mrothfuss</name></author>
	</entry>
	<entry>
		<id>https://15h.org/index.php?title=AGESA_15h&amp;diff=2937</id>
		<title>AGESA 15h</title>
		<link rel="alternate" type="text/html" href="https://15h.org/index.php?title=AGESA_15h&amp;diff=2937"/>
		<updated>2026-07-08T21:10:19Z</updated>

		<summary type="html">&lt;p&gt;Mrothfuss: /* Debugging */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;== Debugging ==&lt;br /&gt;
To enable debugging, the following make menuconfig options are recommended:&lt;br /&gt;
* Chipset &amp;gt; Enable AGESA Debugging = ON&lt;br /&gt;
* Chipset &amp;gt; Debug AGESA Config = ON&lt;br /&gt;
* Chipset &amp;gt; Debug AGESA CPU Code = ON&lt;br /&gt;
* Chipset &amp;gt; Debug AGESA HT Code = ON&lt;br /&gt;
* Chipset &amp;gt; Debug AGESA MEM Status = ON&lt;br /&gt;
* Chipset &amp;gt; Debug AGESA MEM Flow = ON&lt;br /&gt;
* Chipset &amp;gt; Debug AGESA MEM Registers = OFF&lt;br /&gt;
* Chipset &amp;gt; Debug AGESA S3 Code = OFF&lt;br /&gt;
* Console &amp;gt; Default console log level = 7 (DEBUG)&lt;br /&gt;
&lt;br /&gt;
The availability of debugging methods will vary by motherboard. Using the COM1 port is most ideal if supported. Every device supports [[EHCI Debugging|EHCI debugging]], but this method can be slower and quirky.&lt;br /&gt;
&lt;br /&gt;
== DDR3 Support ==&lt;br /&gt;
The vast majority of UDIMM, RDIMM, and LRDIMM DDR3 modules are expected to work without issue. So far only [[AGESA_15h#Incompatible_DDR3_Modules|one]] module has been found to be incompatible with the AGESA. The maximum RAM supported is 256 GB per CPU socket. RDIMM modules are recommended for motherboards that support them. The following is an incomplete list of tested modules. Review the deployed systems list for well tested hardware configurations.&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!-- Keep this table sorted by&lt;br /&gt;
1, Brand (A to Z)&lt;br /&gt;
2, ECC (No, Yes)&lt;br /&gt;
3, Type (DIMM, UDIMM, RDIMM, LRDIMM)&lt;br /&gt;
4, Capacity (Low to High)&lt;br /&gt;
5, Speed (Low to High) --&amp;gt;&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
|+&lt;br /&gt;
!Product&lt;br /&gt;
!ECC&lt;br /&gt;
!Type&lt;br /&gt;
!Capacity&lt;br /&gt;
!Speed&lt;br /&gt;
!Tester&lt;br /&gt;
|-&lt;br /&gt;
|Actica ACT4GHU72D8H1333S&lt;br /&gt;
|Yes&lt;br /&gt;
|UDIMM&lt;br /&gt;
|4 GB&lt;br /&gt;
|1333 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Actica ACT8GHR72Q4H1600S&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|8 GB&lt;br /&gt;
|1600 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|ASint SLA302G08-GGNHC&lt;br /&gt;
|No&lt;br /&gt;
|UDIMM&lt;br /&gt;
|4 GB&lt;br /&gt;
|1600 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|ELPIDA EBJ81RF4BDWD-DJ-F&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|8 GB&lt;br /&gt;
|1333 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Corsair TR3X6G1333C9&lt;br /&gt;
|No&lt;br /&gt;
|UDIMM&lt;br /&gt;
|2 GB&lt;br /&gt;
|1333 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Crucial CT16G3ERSLD4160B&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|16 GB&lt;br /&gt;
|1600 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Crucial CT32G3ELSDQ4186D&lt;br /&gt;
|Yes&lt;br /&gt;
|LRDIMM&lt;br /&gt;
|32 GB&lt;br /&gt;
|1866 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Hynix HMT42GR7AFR4A-PB&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|16 GB&lt;br /&gt;
|1600 MHz&lt;br /&gt;
|pkubaj&lt;br /&gt;
|-&lt;br /&gt;
|Hynix HMT84GL7MMR4A-H9&lt;br /&gt;
|Yes&lt;br /&gt;
|LRDIMM&lt;br /&gt;
|32 GB&lt;br /&gt;
|1333 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Kingston KVR13N9S8/4&lt;br /&gt;
|No&lt;br /&gt;
|UDIMM&lt;br /&gt;
|4 GB&lt;br /&gt;
|1333 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Kingston KVR16E11/8I&lt;br /&gt;
|Yes&lt;br /&gt;
|UDIMM&lt;br /&gt;
|8 GB&lt;br /&gt;
|1600 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Kingston KVR1333D3D4R9S/4G&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|4 GB&lt;br /&gt;
|1333 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Kingston KVR16R11D4K4/32I&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|8 GB&lt;br /&gt;
|1600 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Micron MT36KSF2G72PZ-1G4E1&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|16 GB&lt;br /&gt;
|1333 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Micron MT36KSF2G72PZ-1G6E1FE&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|16 GB&lt;br /&gt;
|1600 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Micron MT36KSF2G72PZ-1G6N1KF&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|16 GB&lt;br /&gt;
|1600 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Nanya NT4GC64B8HG0NF-DI&lt;br /&gt;
|No&lt;br /&gt;
|UDIMM&lt;br /&gt;
|4 GB&lt;br /&gt;
|1600 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Samsung M393B1K70DH0-YH9&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|8 GB&lt;br /&gt;
|1333 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Samsung M393B1G70QH0-YK0&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|8 GB&lt;br /&gt;
|1600 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Samsung M393B2K70DM0-YF8&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|16 GB&lt;br /&gt;
|1066 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Samsung M393B2G70BH0-CK0&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|16 GB&lt;br /&gt;
|1600 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Samsung M393B4G70BM0-YH9&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|32 GB&lt;br /&gt;
|1333 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Samsung M393B4G70DM0-YH9&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|32 GB&lt;br /&gt;
|1333 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Samsung M386B4G70DM0-CMA&lt;br /&gt;
|Yes&lt;br /&gt;
|LRDIMM&lt;br /&gt;
|32 GB&lt;br /&gt;
|1866 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Samsung M386B4G70DM0-YK04&lt;br /&gt;
|Yes&lt;br /&gt;
|LRDIMM&lt;br /&gt;
|32 GB&lt;br /&gt;
|1600 MHz&lt;br /&gt;
|[[User:Sbrudenell|sbrudenell]]&lt;br /&gt;
|-&lt;br /&gt;
|Samsung M386B8G70DE0-YH93&lt;br /&gt;
|Yes&lt;br /&gt;
|LRDIMM&lt;br /&gt;
|64 GB&lt;br /&gt;
|1333 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Super Talent W1333UB4GS&lt;br /&gt;
|No&lt;br /&gt;
|UDIMM&lt;br /&gt;
|4 GB&lt;br /&gt;
|1333 MHz&lt;br /&gt;
|[[User:Frantic|frantic]]&lt;br /&gt;
|-&lt;br /&gt;
|Super Talent W1333EB4GS&lt;br /&gt;
|Yes&lt;br /&gt;
|UDIMM&lt;br /&gt;
|4 GB&lt;br /&gt;
|1333 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Super Talent W16RB8G4S&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|8 GB&lt;br /&gt;
|1600 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Super Talent W13RC16G4H&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|16 GB&lt;br /&gt;
|1333 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
=== Incompatible DDR3 Modules ===&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!-- Keep this table sorted by&lt;br /&gt;
1, Brand (A to Z)&lt;br /&gt;
2, ECC (No, Yes)&lt;br /&gt;
3, Type (DIMM, UDIMM, RDIMM, LRDIMM)&lt;br /&gt;
4, Capacity (Low to High)&lt;br /&gt;
5, Speed (Low to High) --&amp;gt;&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
|+&lt;br /&gt;
!Product&lt;br /&gt;
!ECC&lt;br /&gt;
!Type&lt;br /&gt;
!Capacity&lt;br /&gt;
!Speed&lt;br /&gt;
!Tester&lt;br /&gt;
!Remarks&lt;br /&gt;
|-&lt;br /&gt;
|OWC OWC1333D3MPE16G&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|16 GB&lt;br /&gt;
|1333 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|Designed for Apple Machines. SPD Data was incomplete.&lt;br /&gt;
|}&lt;/div&gt;</summary>
		<author><name>Mrothfuss</name></author>
	</entry>
	<entry>
		<id>https://15h.org/index.php?title=AGESA_15h&amp;diff=2936</id>
		<title>AGESA 15h</title>
		<link rel="alternate" type="text/html" href="https://15h.org/index.php?title=AGESA_15h&amp;diff=2936"/>
		<updated>2026-07-08T21:07:55Z</updated>

		<summary type="html">&lt;p&gt;Mrothfuss: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;== Debugging ==&lt;br /&gt;
To enable debugging, the following make menuconfig options are recommended:&lt;br /&gt;
* Chipset &amp;gt; Enable AGESA Debugging = ON&lt;br /&gt;
* Chipset &amp;gt; Debug AGESA Config = ON&lt;br /&gt;
* Chipset &amp;gt; Debug AGESA CPU Code = ON&lt;br /&gt;
* Chipset &amp;gt; Debug AGESA HT Code = ON&lt;br /&gt;
* Chipset &amp;gt; Debug AGESA MEM Status = ON&lt;br /&gt;
* Chipset &amp;gt; Debug AGESA MEM Flow = ON&lt;br /&gt;
* Chipset &amp;gt; Debug AGESA MEM Registers = OFF&lt;br /&gt;
* Chipset &amp;gt; Debug AGESA S3 Code = OFF&lt;br /&gt;
* Console &amp;gt; Default console log level = 7 (DEBUG)&lt;br /&gt;
&lt;br /&gt;
== DDR3 Support ==&lt;br /&gt;
The vast majority of UDIMM, RDIMM, and LRDIMM DDR3 modules are expected to work without issue. So far only [[AGESA_15h#Incompatible_DDR3_Modules|one]] module has been found to be incompatible with the AGESA. The maximum RAM supported is 256 GB per CPU socket. RDIMM modules are recommended for motherboards that support them. The following is an incomplete list of tested modules. Review the deployed systems list for well tested hardware configurations.&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!-- Keep this table sorted by&lt;br /&gt;
1, Brand (A to Z)&lt;br /&gt;
2, ECC (No, Yes)&lt;br /&gt;
3, Type (DIMM, UDIMM, RDIMM, LRDIMM)&lt;br /&gt;
4, Capacity (Low to High)&lt;br /&gt;
5, Speed (Low to High) --&amp;gt;&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
|+&lt;br /&gt;
!Product&lt;br /&gt;
!ECC&lt;br /&gt;
!Type&lt;br /&gt;
!Capacity&lt;br /&gt;
!Speed&lt;br /&gt;
!Tester&lt;br /&gt;
|-&lt;br /&gt;
|Actica ACT4GHU72D8H1333S&lt;br /&gt;
|Yes&lt;br /&gt;
|UDIMM&lt;br /&gt;
|4 GB&lt;br /&gt;
|1333 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Actica ACT8GHR72Q4H1600S&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|8 GB&lt;br /&gt;
|1600 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|ASint SLA302G08-GGNHC&lt;br /&gt;
|No&lt;br /&gt;
|UDIMM&lt;br /&gt;
|4 GB&lt;br /&gt;
|1600 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|ELPIDA EBJ81RF4BDWD-DJ-F&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|8 GB&lt;br /&gt;
|1333 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Corsair TR3X6G1333C9&lt;br /&gt;
|No&lt;br /&gt;
|UDIMM&lt;br /&gt;
|2 GB&lt;br /&gt;
|1333 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Crucial CT16G3ERSLD4160B&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|16 GB&lt;br /&gt;
|1600 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Crucial CT32G3ELSDQ4186D&lt;br /&gt;
|Yes&lt;br /&gt;
|LRDIMM&lt;br /&gt;
|32 GB&lt;br /&gt;
|1866 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Hynix HMT42GR7AFR4A-PB&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|16 GB&lt;br /&gt;
|1600 MHz&lt;br /&gt;
|pkubaj&lt;br /&gt;
|-&lt;br /&gt;
|Hynix HMT84GL7MMR4A-H9&lt;br /&gt;
|Yes&lt;br /&gt;
|LRDIMM&lt;br /&gt;
|32 GB&lt;br /&gt;
|1333 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Kingston KVR13N9S8/4&lt;br /&gt;
|No&lt;br /&gt;
|UDIMM&lt;br /&gt;
|4 GB&lt;br /&gt;
|1333 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Kingston KVR16E11/8I&lt;br /&gt;
|Yes&lt;br /&gt;
|UDIMM&lt;br /&gt;
|8 GB&lt;br /&gt;
|1600 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Kingston KVR1333D3D4R9S/4G&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|4 GB&lt;br /&gt;
|1333 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Kingston KVR16R11D4K4/32I&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|8 GB&lt;br /&gt;
|1600 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Micron MT36KSF2G72PZ-1G4E1&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|16 GB&lt;br /&gt;
|1333 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Micron MT36KSF2G72PZ-1G6E1FE&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|16 GB&lt;br /&gt;
|1600 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Micron MT36KSF2G72PZ-1G6N1KF&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|16 GB&lt;br /&gt;
|1600 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Nanya NT4GC64B8HG0NF-DI&lt;br /&gt;
|No&lt;br /&gt;
|UDIMM&lt;br /&gt;
|4 GB&lt;br /&gt;
|1600 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Samsung M393B1K70DH0-YH9&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|8 GB&lt;br /&gt;
|1333 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Samsung M393B1G70QH0-YK0&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|8 GB&lt;br /&gt;
|1600 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Samsung M393B2K70DM0-YF8&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|16 GB&lt;br /&gt;
|1066 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Samsung M393B2G70BH0-CK0&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|16 GB&lt;br /&gt;
|1600 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Samsung M393B4G70BM0-YH9&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|32 GB&lt;br /&gt;
|1333 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Samsung M393B4G70DM0-YH9&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|32 GB&lt;br /&gt;
|1333 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Samsung M386B4G70DM0-CMA&lt;br /&gt;
|Yes&lt;br /&gt;
|LRDIMM&lt;br /&gt;
|32 GB&lt;br /&gt;
|1866 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Samsung M386B4G70DM0-YK04&lt;br /&gt;
|Yes&lt;br /&gt;
|LRDIMM&lt;br /&gt;
|32 GB&lt;br /&gt;
|1600 MHz&lt;br /&gt;
|[[User:Sbrudenell|sbrudenell]]&lt;br /&gt;
|-&lt;br /&gt;
|Samsung M386B8G70DE0-YH93&lt;br /&gt;
|Yes&lt;br /&gt;
|LRDIMM&lt;br /&gt;
|64 GB&lt;br /&gt;
|1333 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Super Talent W1333UB4GS&lt;br /&gt;
|No&lt;br /&gt;
|UDIMM&lt;br /&gt;
|4 GB&lt;br /&gt;
|1333 MHz&lt;br /&gt;
|[[User:Frantic|frantic]]&lt;br /&gt;
|-&lt;br /&gt;
|Super Talent W1333EB4GS&lt;br /&gt;
|Yes&lt;br /&gt;
|UDIMM&lt;br /&gt;
|4 GB&lt;br /&gt;
|1333 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Super Talent W16RB8G4S&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|8 GB&lt;br /&gt;
|1600 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|Super Talent W13RC16G4H&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|16 GB&lt;br /&gt;
|1333 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
=== Incompatible DDR3 Modules ===&lt;br /&gt;
&lt;br /&gt;
&amp;lt;!-- Keep this table sorted by&lt;br /&gt;
1, Brand (A to Z)&lt;br /&gt;
2, ECC (No, Yes)&lt;br /&gt;
3, Type (DIMM, UDIMM, RDIMM, LRDIMM)&lt;br /&gt;
4, Capacity (Low to High)&lt;br /&gt;
5, Speed (Low to High) --&amp;gt;&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
|+&lt;br /&gt;
!Product&lt;br /&gt;
!ECC&lt;br /&gt;
!Type&lt;br /&gt;
!Capacity&lt;br /&gt;
!Speed&lt;br /&gt;
!Tester&lt;br /&gt;
!Remarks&lt;br /&gt;
|-&lt;br /&gt;
|OWC OWC1333D3MPE16G&lt;br /&gt;
|Yes&lt;br /&gt;
|RDIMM&lt;br /&gt;
|16 GB&lt;br /&gt;
|1333 MHz&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|Designed for Apple Machines. SPD Data was incomplete.&lt;br /&gt;
|}&lt;/div&gt;</summary>
		<author><name>Mrothfuss</name></author>
	</entry>
	<entry>
		<id>https://15h.org/index.php?title=External_Flashing&amp;diff=2927</id>
		<title>External Flashing</title>
		<link rel="alternate" type="text/html" href="https://15h.org/index.php?title=External_Flashing&amp;diff=2927"/>
		<updated>2026-06-27T01:53:26Z</updated>

		<summary type="html">&lt;p&gt;Mrothfuss: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;External flashing is required when switching from the original OEM firmware to coreboot firmware. Once a system is running coreboot, it can be updated internally using flashrom. If needed, both OEM and coreboot firmware ROMs can be [[Padding ROMs|padded]] to match the size of your flash chip.&lt;br /&gt;
&lt;br /&gt;
== SOIC-8 and DIP-8 Flash Chips ==&lt;br /&gt;
[[File:SOIC8 and DIP8 Pinout.png|frameless|400x400px]]&lt;br /&gt;
&lt;br /&gt;
The orientation the flash chip can be determined by identifying the circle near pin 1 (SOIC-8, soldered) or the semicircle at the top of the chip (DIP-8, socketed). Before removing DIP-8 flash chips, be sure to note the original orientation on the motherboard to ensure correct reinstallation.&lt;br /&gt;
&lt;br /&gt;
== CH341a ==&lt;br /&gt;
[[File:DIP8 Flashing Labeled.png|frameless|600x600px]]&lt;br /&gt;
&lt;br /&gt;
DIP-8 flash chips can be inserted into the CH341a for flashing, as depicted above.&lt;br /&gt;
&lt;br /&gt;
[[File:H8SCM Flashing.png|frameless|600x600px]]&lt;br /&gt;
&lt;br /&gt;
SOIC-8 flash chips can be attached to the CH341a using a clip. In the above image, the line for pin 1 is colored red to facilitate quick orientation of the flash clip onto the motherboard.&lt;br /&gt;
&lt;br /&gt;
=== Flashrom Support ===&lt;br /&gt;
&lt;br /&gt;
The CH341a is supported by flashrom.&lt;br /&gt;
&lt;br /&gt;
 &amp;lt;nowiki&amp;gt;&lt;br /&gt;
# read the flash chip&lt;br /&gt;
flashrom -p ch341a_spi -r image.rom&lt;br /&gt;
&lt;br /&gt;
# write to the flash chip&lt;br /&gt;
flashrom -p ch341a_spi -w image.rom&lt;br /&gt;
&amp;lt;/nowiki&amp;gt;&lt;br /&gt;
&lt;br /&gt;
=== Voltage Verification ===&lt;br /&gt;
[[File:CH341a Testing.png|frameless|600x600px]]&lt;br /&gt;
&lt;br /&gt;
Many different USB flashers are sold as &amp;quot;CH341a&amp;quot;, often without any specific product identifiers in the name besides &amp;quot;CH341a&amp;quot;. Some flash tools using the CH341a supply the incorrect voltage, often 5.0V, to the data lines (pins 1, 2, 3, 5, 6, and 7) instead of 3.3V. A voltmeter can be used to test your specific CH341a variant. To measure the voltage at each pin, hold the voltmeter&#039;s ground to pin 4 (GND) and touch the probe to each of the other pins on the CH341a. In the image above, the red probe is connected to pin 8 (VCC) and the black probe is connected to pin 4 (GND). If they all read ~3.3V, your CH341a was designed correctly. It is possible to fix a faulty CH341a, but this requires soldering.&lt;br /&gt;
&lt;br /&gt;
=== Voltage Verified Programmers ===&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
|+&lt;br /&gt;
!Type&lt;br /&gt;
!Product Name&lt;br /&gt;
!Product URL&lt;br /&gt;
!Opearting Voltage&lt;br /&gt;
!Remarks&lt;br /&gt;
!Tested By&lt;br /&gt;
|-&lt;br /&gt;
|CH341a&lt;br /&gt;
|CH341A V1.7 by liyf&lt;br /&gt;
|https://www.amazon.com/dp/B0D9XQ4YBV&lt;br /&gt;
|3.35 ± 0.01 V&lt;br /&gt;
|Has a switch for 1.8V, 2.5V, 3.3V, and 5V&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|CH341a&lt;br /&gt;
|Unbranded CH341A (blue)&lt;br /&gt;
|https://www.aliexpress.us/item/2255800921201231.html&lt;br /&gt;
|3.32 ± 0.01 V&lt;br /&gt;
|&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|CH341a&lt;br /&gt;
|Modded CH341A (black)&lt;br /&gt;
|https://www.amazon.com/dp/B07R5LPTYM&lt;br /&gt;
|3.30 ± 0.01 V&lt;br /&gt;
|Modded to operate at 3.3V instead of 5V&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|CH341a&lt;br /&gt;
|Unbranded CH341A (blue)&lt;br /&gt;
|https://www.amazon.com/dp/B082KMN5D9&lt;br /&gt;
|N/A&lt;br /&gt;
|Dead on Arrival&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|-&lt;br /&gt;
|CH347&lt;br /&gt;
|Unbranded CH347&lt;br /&gt;
|https://www.aliexpress.us/item/3256805429430879.html&lt;br /&gt;
|3.26 ± 0.01 V&lt;br /&gt;
|More reliable than the CH341a&lt;br /&gt;
|[[User:Mrothfuss|mrothfuss]]&lt;br /&gt;
|}&lt;/div&gt;</summary>
		<author><name>Mrothfuss</name></author>
	</entry>
	<entry>
		<id>https://15h.org/index.php?title=Padding_ROMs&amp;diff=2926</id>
		<title>Padding ROMs</title>
		<link rel="alternate" type="text/html" href="https://15h.org/index.php?title=Padding_ROMs&amp;diff=2926"/>
		<updated>2026-06-27T01:48:02Z</updated>

		<summary type="html">&lt;p&gt;Mrothfuss: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;ROM images can be padded to match the flash chip you have. This can be done with either OEM or coreboot ROM images. Simply concatenate your image until you reach the desired size.&lt;br /&gt;
&lt;br /&gt;
For example, to pad a 2MB ROM into a 16MB ROM:&lt;br /&gt;
 &amp;lt;nowiki&amp;gt;&lt;br /&gt;
cat image_2MB.rom &amp;gt; image_16MB.rom&lt;br /&gt;
cat image_2MB.rom &amp;gt;&amp;gt; image_16MB.rom&lt;br /&gt;
cat image_2MB.rom &amp;gt;&amp;gt; image_16MB.rom&lt;br /&gt;
cat image_2MB.rom &amp;gt;&amp;gt; image_16MB.rom&lt;br /&gt;
cat image_2MB.rom &amp;gt;&amp;gt; image_16MB.rom&lt;br /&gt;
cat image_2MB.rom &amp;gt;&amp;gt; image_16MB.rom&lt;br /&gt;
cat image_2MB.rom &amp;gt;&amp;gt; image_16MB.rom&lt;br /&gt;
cat image_2MB.rom &amp;gt;&amp;gt; image_16MB.rom&amp;lt;/nowiki&amp;gt;&lt;br /&gt;
&lt;br /&gt;
This is useful if you want to test an OEM or coreboot ROM but do not have the corresponding flash chip size. If you want to actually utilize the extra space on the flash chip with a coreboot ROM, you will need to compile your own.&lt;/div&gt;</summary>
		<author><name>Mrothfuss</name></author>
	</entry>
	<entry>
		<id>https://15h.org/index.php?title=Padding_ROMs&amp;diff=2925</id>
		<title>Padding ROMs</title>
		<link rel="alternate" type="text/html" href="https://15h.org/index.php?title=Padding_ROMs&amp;diff=2925"/>
		<updated>2026-06-27T01:47:21Z</updated>

		<summary type="html">&lt;p&gt;Mrothfuss: Created page with &amp;quot;ROM images can be padded to match the flash chip you have. This can be done with either OEM or coreboot ROM images. Simply concatenate your image until you reach the desired size.  For example, to pad a 2MB ROM into a 16MB ROM:  &amp;lt;nowiki&amp;gt; cat image_2MB.rom &amp;gt; image_16MB.rom cat image_2MB.rom &amp;gt;&amp;gt; image_16MB.rom cat image_2MB.rom &amp;gt;&amp;gt; image_16MB.rom cat image_2MB.rom &amp;gt;&amp;gt; image_16MB.rom cat image_2MB.rom &amp;gt;&amp;gt; image_16MB.rom cat image_2MB.rom &amp;gt;&amp;gt; image_16MB.rom cat image_2MB.rom &amp;gt;&amp;gt; i...&amp;quot;&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;ROM images can be padded to match the flash chip you have. This can be done with either OEM or coreboot ROM images. Simply concatenate your image until you reach the desired size.&lt;br /&gt;
&lt;br /&gt;
For example, to pad a 2MB ROM into a 16MB ROM:&lt;br /&gt;
 &amp;lt;nowiki&amp;gt;&lt;br /&gt;
cat image_2MB.rom &amp;gt; image_16MB.rom&lt;br /&gt;
cat image_2MB.rom &amp;gt;&amp;gt; image_16MB.rom&lt;br /&gt;
cat image_2MB.rom &amp;gt;&amp;gt; image_16MB.rom&lt;br /&gt;
cat image_2MB.rom &amp;gt;&amp;gt; image_16MB.rom&lt;br /&gt;
cat image_2MB.rom &amp;gt;&amp;gt; image_16MB.rom&lt;br /&gt;
cat image_2MB.rom &amp;gt;&amp;gt; image_16MB.rom&lt;br /&gt;
cat image_2MB.rom &amp;gt;&amp;gt; image_16MB.rom&lt;br /&gt;
cat image_2MB.rom &amp;gt;&amp;gt; image_16MB.rom&lt;br /&gt;
&amp;lt;/nowiki&amp;gt;&lt;br /&gt;
&lt;br /&gt;
This is useful if you want to test an OEM or coreboot ROM but do not have the corresponding flash chip size. If you want to actually utilize the extra space on the flash chip with a coreboot ROM, you will need to compile your own.&lt;/div&gt;</summary>
		<author><name>Mrothfuss</name></author>
	</entry>
	<entry>
		<id>https://15h.org/index.php?title=ASUS_KGPE-D16&amp;diff=2924</id>
		<title>ASUS KGPE-D16</title>
		<link rel="alternate" type="text/html" href="https://15h.org/index.php?title=ASUS_KGPE-D16&amp;diff=2924"/>
		<updated>2026-06-23T00:07:22Z</updated>

		<summary type="html">&lt;p&gt;Mrothfuss: /* PCIe 2.0 Slots */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{{Infobox motherboard&lt;br /&gt;
  |image = Kgpe-d16.jpeg&lt;br /&gt;
  |image_size = 300&lt;br /&gt;
&lt;br /&gt;
  |introduced = 2010&lt;br /&gt;
  |manufacturer = ASUS&lt;br /&gt;
&lt;br /&gt;
  |socket = 2x [[G34]]&lt;br /&gt;
  |northbridge = [[AMD SR5690]]&lt;br /&gt;
  |southbridge = [[AMD SP5100]]&lt;br /&gt;
  |superio = [[Winbond W83667HG-A]]&lt;br /&gt;
  |bmc = [[ASPEED AST2050]]&lt;br /&gt;
  |bmcflash = Removable Module&lt;br /&gt;
  |ram = 16 slots (8 channels) DDR3-1600 ECC UDIMM/RDIMM/LRDIMM, up to 512GB on coreboot&lt;br /&gt;
  |bios = 2 MiB socketed DIP-8 (W25Q16V)&lt;br /&gt;
  |formfactor = SSI EEB&lt;br /&gt;
  |power = 2x 8-pin EPS&lt;br /&gt;
  &lt;br /&gt;
  |slot1 = PCIe Gen2 x16 (disabled if Slot 2 in use)&lt;br /&gt;
  |slot2 = PCIe Gen2 x16 (disables Slot 1 if in use)&lt;br /&gt;
  |slot3 = PCIe Gen2 x8 (electrically x4)&lt;br /&gt;
  |slot4 = PCIe Gen2 x16 (x8 if Slot 5 in use)&lt;br /&gt;
  |slot5 = PCIe Gen2 x16 (electrically x8)&lt;br /&gt;
  |slot6 = 32-bit Legacy PCI&lt;br /&gt;
  |slot7 = ASUS [[PIKE2008]] Interface&lt;br /&gt;
&lt;br /&gt;
  |gpu = [[ASPEED AST2050|AST2050 Integrated VGA]]&lt;br /&gt;
  |nic = 2x Intel 82574L Gigabit&lt;br /&gt;
  |storagecontroller = SP5100&#039;s SATA2 (3.0 Gbps), no SAS unless [[PIKE2008]] installed&lt;br /&gt;
  |usbcontroller = SP5100&#039;s onboard USB 2.0&lt;br /&gt;
  |serial = One SIO-provided RS232, one virtual BMC console port&lt;br /&gt;
  |audio = None (ASUS recommended a PCI sound card)&lt;br /&gt;
}}&lt;br /&gt;
&lt;br /&gt;
The &#039;&#039;&#039;ASUS KGPE-D16&#039;&#039;&#039;, commonly referred to as the &#039;&#039;&#039;D16&#039;&#039;&#039;, is a dual-socket server/workstation motherboard released by ASUS on April 7th, 2010&amp;lt;ref&amp;gt;https://www.techpowerup.com/119540/asus-releases-kgpe-d16-socket-g34-motherboard-for-12-core-amd-opteron-processors&amp;lt;/ref&amp;gt;, for use with [[Socket G34]] Opteron processors. Originally sold as a standalone board in a mostly-standard SSI EEB form factor, and intended for both desktop and rack-mounted uses, the KGPE-D16 is popular among enthusiasts as a relatively versatile and workstation-friendly G34 platform.&lt;br /&gt;
&lt;br /&gt;
Ports of [[coreboot]] and [[OpenBMC]] to the D16 were initially developed by [[Raptor Engineering]] between 2015 and 2017. Among major coreboot versions, it was first supported in coreboot 4.2 in October 2015, and last supported in coreboot 4.11 in November 2019. The port was never completed and was removed in coreboot 4.12 due to lack of maintenance. Between 2021 and 2022, after seeking funding for such an effort for several years, [[3mdeb]] developed an out-of-tree fork of coreboot 4.15 for the board under their Dasharo brand. The effort to complete and re-upstream the [[Raptor Engineering|Raptor]] port was unsuccessful and officially abandoned in August 2025&amp;lt;ref&amp;gt;https://github.com/Dasharo/dasharo-issues/issues/478&amp;lt;/ref&amp;gt;.&lt;br /&gt;
&lt;br /&gt;
An independent port of [[coreboot]] to the D16, using AMD&#039;s open source AGESA and CIMx codebases, was released in October 2025 by 15h.org. It is currently the most complete and only actively developed port of [[coreboot]] for the KGPE-D16.&lt;br /&gt;
&lt;br /&gt;
== Open Source Firmware ==&lt;br /&gt;
Open source firmware for the KGPE-D16 is provided by [[coreboot-15h]] utilizing AMD&#039;s open source AGESA and CIMx releases for platform initialization. The git repository for the firmware can be reviewed [https://git.15h.org/mrothfuss/coreboot-15h here].&lt;br /&gt;
&lt;br /&gt;
=== coreboot-15h ===&lt;br /&gt;
{{Excerpt|Coreboot-15h|[[ASUS KGPE-D16]]|hat=no|bold=1}}&lt;br /&gt;
&lt;br /&gt;
=== Display Output ===&lt;br /&gt;
[[File:KGPE-D16 VGA Jumper.png|frameless|400x400px]]&lt;br /&gt;
&lt;br /&gt;
The mainboard VGA_SW1 jumper determines whether the onboard VGA ([[ASPEED AST2050|AST2050]]) or a PCIe GPU will be used as the bootup display. Set VGA_SW1 to &amp;quot;Enable&amp;quot; to use the onboard VGA. Set VGA_SW1 to &amp;quot;Disable&amp;quot; to use a PCIe GPU. Once your OS has booted, drivers for any GPU of your choice can be used to setup a display. For blob-free opertions, it is recommended to use the onboard VGA in textmode for the bootup display but then switch to a FOSS driver (ie: amdgpu) for the user interface.&lt;br /&gt;
&lt;br /&gt;
==== Onboard VGA Output ====&lt;br /&gt;
The onboard VGA, [[ASPEED AST2050|AST2050]], can be setup with a closed-source VGABIOS (full VGA support) or with an open-source coreboot driver (textmode VGA support). A compatible display, generally an old VGA monitor, will be required to use the open-source driver. The closed-source VGABIOS is only included in coreboot-15h release ROMs with the &amp;quot;VGA-OpROMs&amp;quot; tag.&lt;br /&gt;
&lt;br /&gt;
==== PCIe GPU Output ====&lt;br /&gt;
To use a PCIe GPU as the bootup display, PCIe Option ROMs must be executed by SeaBIOS. This is enabled in 15h.org release ROMs with the &amp;quot;VGA-OpROMs&amp;quot; tag. The relevant coreboot-15h menuconfig option for SeaBIOS is &amp;quot;Payload &amp;gt; Execute PCIe Option ROMs&amp;quot;. The &amp;quot;VGA Only&amp;quot; option is the recommended setting when using a PCIe GPU as the bootup display.&lt;br /&gt;
&lt;br /&gt;
=== Fan Output ===&lt;br /&gt;
[[File:KGPE-D16 Fan Jumper.png|frameless|400x400px]]&lt;br /&gt;
&lt;br /&gt;
The [[coreboot-15h]] release ROMs for KGPE-D16 are configured to adjust fan speeds based on temperatures measured at the CPUs and the Northbridge. The KGPE-D16 has two fan zones: one for CPU fans (CPUFAN_SEL1) and one for chassis fans (CHAFAN_SEL1). These can be assigned to either 4-pin (PWM regulated) or 3-pin (Voltage regulated) fan control outputs. The 4-pin (PWM regulation) mode offers better control over fan speeds and is the recommended setting for both fan zones. It is important to not use a 4-pin fan in a zone configured for 3-pin control; the fan will receive both voltage regulation and PWM regulation, causing irregular fan speeds. For quiet 3-pin chassis fans, it is recommended to leave the CHAFAN_SEL1 set to 4-pin (PWM regulation) mode. This will let the 3-pin chassis fans operate at 100% speed regardless of thermal readings.&lt;br /&gt;
&lt;br /&gt;
=== Missing Features ===&lt;br /&gt;
* SeaBIOS does not respond to keyboards behind a USB hub.&lt;br /&gt;
* Hibernation and Suspend/Resume are unsupported.&lt;br /&gt;
* Opteron 6100 series CPUs are unsupported.&lt;br /&gt;
* ASUS MIO audio cards are untested.&lt;br /&gt;
&lt;br /&gt;
=== Flashing ===&lt;br /&gt;
To switch from the stock firmware to coreboot, [[External Flashing | external flashing]] is required. The DIP-8 flash chip is located at the bottom right corner of the board (labeled BIOS in the motherboard diagram). A 3.3V CH341a programmer can be used to flash coreboot onto the KGPE-D16. When switching to coreboot-15h from the OEM BIOS or coreboot, clearing the CMOS is required.&lt;br /&gt;
&lt;br /&gt;
&#039;&#039;&#039;Clearing the CMOS&#039;&#039;&#039;&lt;br /&gt;
# Turn off the computer, disconnect the power cord and any powered peripherals (Monitors, USB devices, etc)&lt;br /&gt;
# Move the CLRTC1 jumper (located under PCIe Slot 2) to positions 2-3&lt;br /&gt;
# Wait 20 seconds&lt;br /&gt;
# Restore the CLRTC1 jumper to positions 1-2&lt;br /&gt;
# Connect the power cord and turn on the computer&lt;br /&gt;
&lt;br /&gt;
== Deployed Systems ==&lt;br /&gt;
* [[Qubesotron]]&lt;br /&gt;
* [[EmCAST]]&lt;br /&gt;
* [[Atlas]]&lt;br /&gt;
* [[Orion]]&lt;br /&gt;
* [[Unc]]&lt;br /&gt;
* [[Ganoo]]&lt;br /&gt;
* [[RAD01]]&lt;br /&gt;
* [[RAD03]]&lt;br /&gt;
&lt;br /&gt;
Outside of the 15h.org community, it is known that, at least as of 2022, the [https://fsf.org Free Software Foundation] uses KGPE-D16s with 6200-series Opterons [https://www.fsf.org/blogs/sysadmin/closing-in-on-fully-free-bioses-with-the-fsf-tech-team for their servers].&lt;br /&gt;
&lt;br /&gt;
== Motherboard Diagrams ==&lt;br /&gt;
[[File:KGPE-D16 Diagram.png|frameless|400x400px]]&lt;br /&gt;
[[File:KGPE-D16 BlockDiagram.png|frameless|400x400px]]&lt;br /&gt;
&lt;br /&gt;
There is an undocumented 9-pin VGA header next to the rear-IO VGA port. The pins are shared between this header and the rear-IO VGA port.&lt;br /&gt;
&lt;br /&gt;
== Motherboard Components ==&lt;br /&gt;
=== Socket G34 ===&lt;br /&gt;
{{Excerpt|Socket G34|inline=yes|bold=yes}}&lt;br /&gt;
==== AMD Opteron 6100 Series ====&lt;br /&gt;
{{Excerpt|AMD Opteron 6100 Series|inline=yes|bold=yes}}&lt;br /&gt;
==== AMD Opteron 6200 and 6300 Series ====&lt;br /&gt;
{{Excerpt|AMD Opteron 6200 and 6300 Series|inline=yes|bold=yes}}&lt;br /&gt;
=== DDR3 Memory ===&lt;br /&gt;
[[File:KGPE-D16-DIMM-Diagram.png|frameless|1000x1000px]]&lt;br /&gt;
&lt;br /&gt;
{{Excerpt|AGESA 15h|DDR3 Support|inline=yes|bold=yes}}&lt;br /&gt;
&lt;br /&gt;
[[File:KGPE-D16 DDR3 Setting.png|frameless|600x600px]]&lt;br /&gt;
&lt;br /&gt;
The KGPE-D16 provides an external method to override the BIOS DDR3 voltage. BIOS control is configured to select a voltage that maximizes performance for all DIMM modules attached to a socket. Forcing a different voltage may cause stability problems. Use the default jumper setting (1.5V / BIOS control) when using coreboot-15h.&lt;br /&gt;
&lt;br /&gt;
=== PCIe 2.0 Slots ===&lt;br /&gt;
&lt;br /&gt;
[[File:KGPE-D16 PCIE Jumpers.png|frameless|400x400px]]&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
|+&lt;br /&gt;
!Slot&lt;br /&gt;
!Width&lt;br /&gt;
!Wired Lanes&lt;br /&gt;
!Notes&lt;br /&gt;
|-&lt;br /&gt;
|PCIe1&lt;br /&gt;
|x16&lt;br /&gt;
|x16&lt;br /&gt;
|A special PCIe slot designed for the ASUS MIO audio card. Disabled if PCIe2 is occupied.&lt;br /&gt;
|-&lt;br /&gt;
|PCIe2&lt;br /&gt;
|x16&lt;br /&gt;
|x16&lt;br /&gt;
|Disables PCIe1 if occupied. Set motherboard jumper PCIE2_SW1 to positions 2-3 to always enable PCIe2. &lt;br /&gt;
|-&lt;br /&gt;
|PCIe3&lt;br /&gt;
|x8&lt;br /&gt;
|x4&lt;br /&gt;
|&lt;br /&gt;
|-&lt;br /&gt;
|PCIe4&lt;br /&gt;
|x16&lt;br /&gt;
|x8 or x16&lt;br /&gt;
|Switches to x16 mode if PCIe5 is empty. If motherboard jumper PCIE5_SW1 is set to position 2-3, it will always be in x8 mode.&lt;br /&gt;
|-&lt;br /&gt;
|PCIe5&lt;br /&gt;
|x16&lt;br /&gt;
|x8&lt;br /&gt;
|Disables if no card is detected. Set motherboard jumper PCIE5_SW1 to positions 2-3 to always enable PCIe5.&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
PCIe bifurcation of slots PCIe2 and PCIe4 in x8+x8 mode is supported. Bifurcation is a compile-time option that is available under the Motherboard menuconfig section.&lt;br /&gt;
&lt;br /&gt;
=== PIKE Slots ===&lt;br /&gt;
The two PIKE slots, PIKE1 and PIKE2, are used together to attach an ASUS PIKE module to the KGPE-D16. This is required to utilize the 8 onboard SAS ports. These SAS ports support SAS2 and SATA3, making them faster than the onboard SATA2 ports provided by the SP5100. Drives attached to these ports are accessible to the operating system when the PIKE card is configured for [[IT Mode]], but SeaBIOS will not boot from them. The [[PIKE2008]] card, flashed to [[IT Mode]], is recommended to utilize these features.&lt;br /&gt;
&lt;br /&gt;
=== DIP-8 Socket ===&lt;br /&gt;
The DIP-8 Socket houses the mainboard&#039;s BIOS ROM. The following DIP-8 chips are known to work with coreboot on the KGPE-D16.&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
|+&lt;br /&gt;
!Model&lt;br /&gt;
!Size (MB)&lt;br /&gt;
!Size (Mb)&lt;br /&gt;
|-&lt;br /&gt;
|W25Q16BVAIG&lt;br /&gt;
|2&lt;br /&gt;
|16&lt;br /&gt;
|-&lt;br /&gt;
|W25Q64BVAIG&lt;br /&gt;
|8&lt;br /&gt;
|64&lt;br /&gt;
|-&lt;br /&gt;
|W25Q128FVIQ&lt;br /&gt;
|16&lt;br /&gt;
|128&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
=== ASPEED AST2050 ===&lt;br /&gt;
{{Excerpt|ASPEED AST2050|inline=yes|bold=yes}}&lt;br /&gt;
&lt;br /&gt;
Remote administration features on the AST2050 are only activated when a firmware module (ASMB4 or ASMB5) is attached to the KGPE-D16 mainboard (BMC_FW1 slot).&lt;br /&gt;
&lt;br /&gt;
=== AMD SR5690 ===&lt;br /&gt;
{{Excerpt|AMD SR5690|inline=yes|bold=yes}}&lt;br /&gt;
=== AMD SP5100 ===&lt;br /&gt;
{{Excerpt|AMD SP5100|inline=yes|bold=yes}}&lt;br /&gt;
=== Winbond W83667HG-A ===&lt;br /&gt;
{{Excerpt|Winbond W83667HG-A|hat=no}}&lt;br /&gt;
=== Nuvoton W83795G ===&lt;br /&gt;
{{Excerpt|Nuvoton W83795G/ADG|hat=no}}&lt;br /&gt;
&lt;br /&gt;
The ASUS thermal sensor cable (10G090101035) can be used to control fan speeds based on case air temperature readings.&lt;br /&gt;
&lt;br /&gt;
== Motherboard Revisions ==&lt;br /&gt;
Four KGPE-D16 revisions are known: 1.02G, 1.03G, 1.04, and 1.05. The differences between the four revisions have not been disclosed. The more recent boards (1.04 and 1.05) are generally in better condition and are recommended. Board revisions 1.03G, 1.04, and 1.05 are known to perform equally well when in similar condition. No community members have tested a 1.02G revision board. The KGPE-D16 can be found rebranded for distribution in China (KGPE-D16/CHN). The CHN variant can also run coreboot like the other KGPE-D16 variants, there are no known differences.&lt;br /&gt;
&lt;br /&gt;
== Board View ==&lt;br /&gt;
Board views are available for the KGPE-D16. These files can be opened with [[OpenBoardView]].&lt;br /&gt;
&lt;br /&gt;
[https://15h.org/images/f/f0/ASUS_KGPE-D16_Rev_1.04_-_Schematics.zip ASUS_KGPE-D16_Rev_1.04_-_Schematics.zip]&lt;br /&gt;
&lt;br /&gt;
== Custom Parts and Mods ==&lt;br /&gt;
=== Northbridge Fan ===&lt;br /&gt;
[[File:KGPE-D16-40mm-Noctua-chipset.png|frameless|300px]]&lt;br /&gt;
[[File:KGPE-D16 Northbridge Cooling Fan.jpeg|frameless|300px]]&lt;br /&gt;
&lt;br /&gt;
This file is designed to work with a Noctua NF-A4x10 fan. If your motherboard is not in a high-airflow server case, the northbridge fan is highly recommended. The fan bracket mounts onto the northbridge heatsink by snapping onto the metal arms that secure the heatsink. The file may need to be edited to accommodate the exact placement of your 40mm fan cable (the provided design has a cable hole at the bottom right position).&lt;br /&gt;
&lt;br /&gt;
[https://15h.org/images/8/8a/KGPE-D16_Chipsetfan_40mm.stl KGPE-D16_Chipsetfan_40mm.stl]&lt;br /&gt;
&lt;br /&gt;
[https://15h.org/images/9/98/KGPE-D16_Chipsetfan_40mm.blend KGPE-D16_Chipsetfan_40mm.blend]&lt;br /&gt;
&lt;br /&gt;
=== Chipset Thermal Paste ===&lt;br /&gt;
[[File:KGPE-D16_North_bridge_picture.png|frameless|300px]]&lt;br /&gt;
&lt;br /&gt;
Removing the NB/SB heatsinks to reapply the thermal paste can be daunting due to glue used for the NB heatsink, limited wiggle room, and marginal benefit. It is generally considered not worth it.&lt;br /&gt;
&lt;br /&gt;
=== RAM Fan ===&lt;br /&gt;
[[File:KGPE-D16-80mm-Noctua-ram.png|frameless|300x300px]]&lt;br /&gt;
&lt;br /&gt;
This file is designed to work with a Noctua NF-A8 fan. When two of these fan mounts are attached to a Noctua NF-A8 fan, they will be spaced correctly to snap onto the KGPE-D16 RAM clips (white). These clips vary between boards. The included file is designed to work with L-shaped RAM clips. It will not fit as nicely onto the parallelogram-shaped RAM clips.&lt;br /&gt;
&lt;br /&gt;
[https://15h.org/images/f/f8/KGPE-D16_Ramfan_80mm.stl KGPE-D16_Ramfan_80mm.stl]&lt;br /&gt;
&lt;br /&gt;
[https://15h.org/images/9/9c/KGPE-D16_Ramfan_80mm.blend KGPE-D16_Ramfan_80mm.blend]&lt;br /&gt;
&lt;br /&gt;
== References ==&lt;br /&gt;
[https://15h.org/images/4/48/KGPE-D16_Manual.pdf]&lt;/div&gt;</summary>
		<author><name>Mrothfuss</name></author>
	</entry>
	<entry>
		<id>https://15h.org/index.php?title=ASUS_Crosshair_V_Formula-Z&amp;diff=2923</id>
		<title>ASUS Crosshair V Formula-Z</title>
		<link rel="alternate" type="text/html" href="https://15h.org/index.php?title=ASUS_Crosshair_V_Formula-Z&amp;diff=2923"/>
		<updated>2026-06-22T02:17:57Z</updated>

		<summary type="html">&lt;p&gt;Mrothfuss: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{{Infobox motherboard&lt;br /&gt;
  |image = Crosshair V Formula Z Motherboard.png&lt;br /&gt;
  |image_size = 300&lt;br /&gt;
&lt;br /&gt;
  |introduced = 2012&lt;br /&gt;
  |manufacturer = [[ASUS]]&lt;br /&gt;
&lt;br /&gt;
  |socket = 1x [[AM3+]]&lt;br /&gt;
  |northbridge = [[AMD 990FX]]&lt;br /&gt;
  |southbridge = [[AMD SB950]]&lt;br /&gt;
  |superio = ITE IT8721F&lt;br /&gt;
  |ram = 4 slots (2 channels) DDR3-1600 ECC UDIMM, up to 64GB&lt;br /&gt;
  |bios = 8 MiB socketed DIP-8 (W25Q64FVAIG)&lt;br /&gt;
  |formfactor = ATX&lt;br /&gt;
  |power = 1x 8-pin EPS&lt;br /&gt;
  &lt;br /&gt;
  |slot1 = PCIe Gen2 x16&lt;br /&gt;
  |slot2 = PCIe Gen2 x1&lt;br /&gt;
  |slot3 = PCIe Gen2 x16 (electrically x8)&lt;br /&gt;
  |slot4 = PCIe Gen2 x16&lt;br /&gt;
  |slot5 = PCIe Gen2 x1&lt;br /&gt;
  |slot6 = PCIe Gen2 x16 (electrically x4)&lt;br /&gt;
&lt;br /&gt;
  |serial = One internal&lt;br /&gt;
  |audio = Integrated ([[SB950]] HD Audio), ALC892 codec&lt;br /&gt;
}}&lt;br /&gt;
&lt;br /&gt;
The ASUS Crosshair V Formula-Z motherboard was recently ported to [[coreboot-15h]].&lt;br /&gt;
&lt;br /&gt;
== Open Source Firmware ==&lt;br /&gt;
Open source firmware for the Crosshair V Formula-Z is provided by [[coreboot-15h]] utilizing AMD&#039;s open source AGESA and CIMx releases for platform initialization. The git repository for the firmware can be reviewed [https://git.15h.org/mrothfuss/coreboot-15h here].&lt;br /&gt;
&lt;br /&gt;
=== coreboot-15h ===&lt;br /&gt;
{{Excerpt|Coreboot-15h|[[ASUS Crosshair V Formula-Z]]|hat=no|bold=1}}&lt;br /&gt;
&lt;br /&gt;
=== Fan Output ===&lt;br /&gt;
The Crosshair V Formula-Z has three main fan zones: CPU, CHA, and OPT. The various fan headers on the motherboard are labeled accordingly. The CPU and CHA fan zones are controlled by the [[ITE IT8721F]]. The OPT fans are controlled by the EC. In [[coreboot-15h]], CPU fans are setup for PWM control and will respond to changes in CPU temperature. The CHA fans are setup for voltage control and will respond to both the CPU temperature and the [[990FX]] temperature. The OPT fans will operate at full speed.&lt;br /&gt;
&lt;br /&gt;
=== Missing Features ===&lt;br /&gt;
* Hibernation and Suspend/Resume are unsupported.&lt;br /&gt;
* CPUs using the K10 microarchitecture are unsupported.&lt;br /&gt;
&lt;br /&gt;
=== Flashing ===&lt;br /&gt;
To switch from the stock firmware to coreboot, [[External Flashing | external flashing]] is required. It is recommended to update the OEM BIOS to the latest version (2201) before switching to coreboot-15h, this will update the EC firmware to the latest version (GMED-0005). The DIP-8 flash chip is located between PCIE_X8_2 and PCIE_X16/X8_3 (labeled BIOS in the motherboard diagram). A 3.3V CH341a programmer can be used to flash coreboot onto the Crosshair V Formula-Z. When switching to coreboot-15h from the OEM BIOS, clearing the CMOS is required. The original DIP-8 flash chip requires the following flashrom argument:&lt;br /&gt;
&lt;br /&gt;
 &amp;lt;nowiki&amp;gt;&lt;br /&gt;
flashrom -c &amp;quot;W25Q64BV/W25Q64CV/W25Q64FV&amp;quot; &amp;lt;/nowiki&amp;gt;&lt;br /&gt;
&lt;br /&gt;
&#039;&#039;&#039;Clearing the CMOS&#039;&#039;&#039;&lt;br /&gt;
# Turn off the computer, disconnect the power cord and any powered peripherals (Monitors, USB devices, etc)&lt;br /&gt;
# Remove the CMOS battery&lt;br /&gt;
# Wait 20 seconds&lt;br /&gt;
# Reinstall the CMOS battery&lt;br /&gt;
# Connect the power cord&lt;br /&gt;
# Wait 2 minutes&lt;br /&gt;
# Turn on the motherboard&lt;br /&gt;
&lt;br /&gt;
&#039;&#039;&#039;CMOS Battery&#039;&#039;&#039;&lt;br /&gt;
&lt;br /&gt;
The motherboard requires a 3V CR2032 battery for reliable operation. Without a working CMOS battery, a two minute wait is always needed between connecting the motherboard to power and turning it on. This requirement is shared both by the OEM BIOS and coreboot-15h.&lt;br /&gt;
&lt;br /&gt;
== Motherboard Diagrams ==&lt;br /&gt;
[[File:Crosshair V Formula Z Motherboard Diagram.png|frameless|400x400px]]&lt;br /&gt;
&lt;br /&gt;
== Motherboard Components ==&lt;br /&gt;
=== Socket AM3+ ===&lt;br /&gt;
{{Excerpt|Socket AM3+|inline=yes|bold=yes}}&lt;br /&gt;
==== AMD Opteron 3200 and 3300 Series ====&lt;br /&gt;
{{Excerpt|AMD Opteron 3200 and 3300 Series|inline=yes|bold=yes}}&lt;br /&gt;
=== DDR3 Memory ===&lt;br /&gt;
[[File:Sabertooth 990FX R2 RAM Layout.png|frameless|1000x1000px]]&lt;br /&gt;
=== PCIe 2.0 Slots ===&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
|+&lt;br /&gt;
!Slot&lt;br /&gt;
!Width&lt;br /&gt;
!Wired Lanes&lt;br /&gt;
!Notes&lt;br /&gt;
|-&lt;br /&gt;
|PCIE_X16_1&lt;br /&gt;
|x16&lt;br /&gt;
|x16&lt;br /&gt;
|&lt;br /&gt;
|-&lt;br /&gt;
|PCIEX1_1&lt;br /&gt;
|x1&lt;br /&gt;
|x1&lt;br /&gt;
|Wired to the SB950 &lt;br /&gt;
|-&lt;br /&gt;
|PCIE_X8_2&lt;br /&gt;
|x16&lt;br /&gt;
|x8&lt;br /&gt;
|Disables if no card is detected.&lt;br /&gt;
|-&lt;br /&gt;
|PCIEX1_2&lt;br /&gt;
|x1&lt;br /&gt;
|x1&lt;br /&gt;
|Wired to the SB950&lt;br /&gt;
|-&lt;br /&gt;
|PCIE_X16/X8_3&lt;br /&gt;
|x16&lt;br /&gt;
|x8 or x16&lt;br /&gt;
|Switches to x16 mode if PCIE_X8_2 is empty.&lt;br /&gt;
|-&lt;br /&gt;
|PCIE_X4_4&lt;br /&gt;
|x16&lt;br /&gt;
|x4&lt;br /&gt;
|&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
=== AMD 990FX ===&lt;br /&gt;
{{Excerpt|AMD 990FX|inline=yes|bold=yes}}&lt;br /&gt;
=== AMD SB950 ===&lt;br /&gt;
{{Excerpt|AMD SB950|inline=yes|bold=yes}}&lt;br /&gt;
=== ITE IT8721F ===&lt;br /&gt;
{{Excerpt|ITE IT8721F|hat=no}}&lt;/div&gt;</summary>
		<author><name>Mrothfuss</name></author>
	</entry>
	<entry>
		<id>https://15h.org/index.php?title=ASUS_Crosshair_V_Formula-Z&amp;diff=2922</id>
		<title>ASUS Crosshair V Formula-Z</title>
		<link rel="alternate" type="text/html" href="https://15h.org/index.php?title=ASUS_Crosshair_V_Formula-Z&amp;diff=2922"/>
		<updated>2026-06-22T02:15:16Z</updated>

		<summary type="html">&lt;p&gt;Mrothfuss: /* Fan Output */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{{Infobox motherboard&lt;br /&gt;
  |image = Crosshair V Formula Z Motherboard.png&lt;br /&gt;
  |image_size = 300&lt;br /&gt;
&lt;br /&gt;
  |introduced = 2012&lt;br /&gt;
  |manufacturer = [[ASUS]]&lt;br /&gt;
&lt;br /&gt;
  |socket = 1x [[AM3+]]&lt;br /&gt;
  |northbridge = [[AMD 990FX]]&lt;br /&gt;
  |southbridge = [[AMD SB950]]&lt;br /&gt;
  |superio = ITE IT8721F&lt;br /&gt;
  |ram = 4 slots (2 channels) DDR3-1600 ECC UDIMM, up to 64GB&lt;br /&gt;
  |bios = 8 MiB socketed DIP-8 (W25Q64FVAIG)&lt;br /&gt;
  |formfactor = ATX&lt;br /&gt;
  |power = 1x 8-pin EPS&lt;br /&gt;
  &lt;br /&gt;
  |slot1 = PCIe Gen2 x16&lt;br /&gt;
  |slot2 = PCIe Gen2 x1&lt;br /&gt;
  |slot3 = PCIe Gen2 x16 (electrically x8)&lt;br /&gt;
  |slot4 = PCIe Gen2 x16&lt;br /&gt;
  |slot5 = PCIe Gen2 x1&lt;br /&gt;
  |slot6 = PCIe Gen2 x16 (electrically x4)&lt;br /&gt;
&lt;br /&gt;
  |serial = One internal&lt;br /&gt;
  |audio = Integrated ([[SB950]] HD Audio), ALC892 codec&lt;br /&gt;
}}&lt;br /&gt;
&lt;br /&gt;
The ASUS Crosshair V Formula-Z motherboard is under development.&lt;br /&gt;
&lt;br /&gt;
== Open Source Firmware ==&lt;br /&gt;
Open source firmware for the Crosshair V Formula-Z is provided by [[coreboot-15h]] utilizing AMD&#039;s open source AGESA and CIMx releases for platform initialization. The git repository for the firmware can be reviewed [https://git.15h.org/mrothfuss/coreboot-15h here].&lt;br /&gt;
&lt;br /&gt;
=== coreboot-15h ===&lt;br /&gt;
{{Excerpt|Coreboot-15h|[[ASUS Crosshair V Formula-Z]]|hat=no|bold=1}}&lt;br /&gt;
&lt;br /&gt;
=== Fan Output ===&lt;br /&gt;
The Crosshair V Formula-Z has three main fan zones: CPU, CHA, and OPT. The various fan headers on the motherboard are labeled accordingly. The CPU and CHA fan zones are controlled by the [[ITE IT8721F]]. The OPT fans are controlled by the EC. In [[coreboot-15h]], CPU fans are setup for PWM control and will respond to changes in CPU temperature. The CHA fans are setup for voltage control and will respond to both the CPU temperature and the [[990FX]] temperature. The OPT fans will operate at full speed.&lt;br /&gt;
&lt;br /&gt;
=== Missing Features ===&lt;br /&gt;
* Hibernation and Suspend/Resume are unsupported.&lt;br /&gt;
* CPUs using the K10 microarchitecture are unsupported.&lt;br /&gt;
&lt;br /&gt;
=== Flashing ===&lt;br /&gt;
To switch from the stock firmware to coreboot, [[External Flashing | external flashing]] is required. It is recommended to update the OEM BIOS to the latest version (2201) before switching to coreboot-15h, this will update the EC firmware to the latest version (GMED-0005). The DIP-8 flash chip is located between PCIE_X8_2 and PCIE_X16/X8_3 (labeled BIOS in the motherboard diagram). A 3.3V CH341a programmer can be used to flash coreboot onto the Crosshair V Formula-Z. When switching to coreboot-15h from the OEM BIOS, clearing the CMOS is required. The original DIP-8 flash chip requires the following flashrom argument:&lt;br /&gt;
&lt;br /&gt;
 &amp;lt;nowiki&amp;gt;&lt;br /&gt;
flashrom -c &amp;quot;W25Q64BV/W25Q64CV/W25Q64FV&amp;quot; &amp;lt;/nowiki&amp;gt;&lt;br /&gt;
&lt;br /&gt;
&#039;&#039;&#039;Clearing the CMOS&#039;&#039;&#039;&lt;br /&gt;
# Turn off the computer, disconnect the power cord and any powered peripherals (Monitors, USB devices, etc)&lt;br /&gt;
# Remove the CMOS battery&lt;br /&gt;
# Wait 20 seconds&lt;br /&gt;
# Reinstall the CMOS battery&lt;br /&gt;
# Connect the power cord&lt;br /&gt;
# Wait 2 minutes&lt;br /&gt;
# Turn on the motherboard&lt;br /&gt;
&lt;br /&gt;
&#039;&#039;&#039;CMOS Battery&#039;&#039;&#039;&lt;br /&gt;
&lt;br /&gt;
The motherboard requires a 3V CR2032 battery for reliable operation. Without a working CMOS battery, a two minute wait is always needed between connecting the motherboard to power and turning it on. This requirement is shared both by the OEM BIOS and coreboot-15h.&lt;br /&gt;
&lt;br /&gt;
== Motherboard Diagrams ==&lt;br /&gt;
[[File:Crosshair V Formula Z Motherboard Diagram.png|frameless|400x400px]]&lt;br /&gt;
&lt;br /&gt;
== Motherboard Components ==&lt;br /&gt;
=== Socket AM3+ ===&lt;br /&gt;
{{Excerpt|Socket AM3+|inline=yes|bold=yes}}&lt;br /&gt;
==== AMD Opteron 3200 and 3300 Series ====&lt;br /&gt;
{{Excerpt|AMD Opteron 3200 and 3300 Series|inline=yes|bold=yes}}&lt;br /&gt;
=== DDR3 Memory ===&lt;br /&gt;
[[File:Sabertooth 990FX R2 RAM Layout.png|frameless|1000x1000px]]&lt;br /&gt;
=== PCIe 2.0 Slots ===&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
|+&lt;br /&gt;
!Slot&lt;br /&gt;
!Width&lt;br /&gt;
!Wired Lanes&lt;br /&gt;
!Notes&lt;br /&gt;
|-&lt;br /&gt;
|PCIE_X16_1&lt;br /&gt;
|x16&lt;br /&gt;
|x16&lt;br /&gt;
|&lt;br /&gt;
|-&lt;br /&gt;
|PCIEX1_1&lt;br /&gt;
|x1&lt;br /&gt;
|x1&lt;br /&gt;
|Wired to the SB950 &lt;br /&gt;
|-&lt;br /&gt;
|PCIE_X8_2&lt;br /&gt;
|x16&lt;br /&gt;
|x8&lt;br /&gt;
|Disables if no card is detected.&lt;br /&gt;
|-&lt;br /&gt;
|PCIEX1_2&lt;br /&gt;
|x1&lt;br /&gt;
|x1&lt;br /&gt;
|Wired to the SB950&lt;br /&gt;
|-&lt;br /&gt;
|PCIE_X16/X8_3&lt;br /&gt;
|x16&lt;br /&gt;
|x8 or x16&lt;br /&gt;
|Switches to x16 mode if PCIE_X8_2 is empty.&lt;br /&gt;
|-&lt;br /&gt;
|PCIE_X4_4&lt;br /&gt;
|x16&lt;br /&gt;
|x4&lt;br /&gt;
|&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
=== AMD 990FX ===&lt;br /&gt;
{{Excerpt|AMD 990FX|inline=yes|bold=yes}}&lt;br /&gt;
=== AMD SB950 ===&lt;br /&gt;
{{Excerpt|AMD SB950|inline=yes|bold=yes}}&lt;br /&gt;
=== ITE IT8721F ===&lt;br /&gt;
{{Excerpt|ITE IT8721F|hat=no}}&lt;/div&gt;</summary>
		<author><name>Mrothfuss</name></author>
	</entry>
	<entry>
		<id>https://15h.org/index.php?title=Board_Grid&amp;diff=2921</id>
		<title>Board Grid</title>
		<link rel="alternate" type="text/html" href="https://15h.org/index.php?title=Board_Grid&amp;diff=2921"/>
		<updated>2026-06-22T02:13:55Z</updated>

		<summary type="html">&lt;p&gt;Mrothfuss: /* Stable Support */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;== Stable Support ==&lt;br /&gt;
coreboot ports for these machines work with a wide range of peripherals (in some cases supporting more hardware than their stock firmware), have reliable hardware-based fan control, and have been deployed successfully by 15h.org community members. Review the corresponding [[Motherboards|motherboard]] page for any remaining missing or untested features. For source, see [https://git.15h.org/mrothfuss/coreboot-15h our git forge].&lt;br /&gt;
&lt;br /&gt;
{{Board card&lt;br /&gt;
 |mfr = ASUS&lt;br /&gt;
 |name = KGPE-D16&lt;br /&gt;
 |cpubrand = Opteron&lt;br /&gt;
 |image = Kgpe-d16.jpeg&lt;br /&gt;
 |socket = 2x G34&lt;br /&gt;
 |cores = 32&lt;br /&gt;
 |ram = 512GB ECC&lt;br /&gt;
 |formfactor = SSI EEB&lt;br /&gt;
 |desc = Popular choice among 15h users. BMC supports blob-free VGA and OpenBMC. Versatile I/O.&lt;br /&gt;
}}&lt;br /&gt;
&lt;br /&gt;
{{Board card&lt;br /&gt;
 |mfr = ASUS&lt;br /&gt;
 |name = KCMA-D8&lt;br /&gt;
 |cpubrand = Opteron&lt;br /&gt;
 |image = Asus-kcma-d8-top-64c7d3a66747d247126312.jpg&lt;br /&gt;
 |socket = 2x C32&lt;br /&gt;
 |cores = 16&lt;br /&gt;
 |ram = 512GB ECC&lt;br /&gt;
 |formfactor = SSI CEB&lt;br /&gt;
 |desc = Lower-power and more compact than KGPE-D16. BMC supports blob-free VGA and OpenBMC.&lt;br /&gt;
}}&lt;br /&gt;
&lt;br /&gt;
{{Board card&lt;br /&gt;
 |mfr = ASUS&lt;br /&gt;
 |name = Crosshair V Formula-Z&lt;br /&gt;
 |cpubrand = FX&lt;br /&gt;
 |image = Crosshair V Formula Z Motherboard.png&lt;br /&gt;
 |socket = AM3+&lt;br /&gt;
 |cores = 8&lt;br /&gt;
 |ram = 64GB ECC&lt;br /&gt;
 |formfactor = ATX&lt;br /&gt;
 |desc = A gaming motherboard with high single core performance.&lt;br /&gt;
}}&lt;br /&gt;
&lt;br /&gt;
{{Board card&lt;br /&gt;
 |mfr = Supermicro&lt;br /&gt;
 |name = H8QG6&lt;br /&gt;
 |cpubrand = Opteron&lt;br /&gt;
 |image = H8QGi+-F_Motherboard.png&lt;br /&gt;
 |socket = 4x G34&lt;br /&gt;
 |cores = 64&lt;br /&gt;
 |ram = 1TB ECC&lt;br /&gt;
 |formfactor = SWTX&lt;br /&gt;
 |desc = The largest and most-performant board supported in coreboot-15h.&lt;br /&gt;
}}&lt;br /&gt;
&lt;br /&gt;
{{Board card&lt;br /&gt;
 |mfr = Supermicro&lt;br /&gt;
 |name = H8SGL&lt;br /&gt;
 |cpubrand = Opteron&lt;br /&gt;
 |image = H8SGL_Board.png&lt;br /&gt;
 |socket = 1x G34&lt;br /&gt;
 |cores = 16&lt;br /&gt;
 |ram = 256GB ECC&lt;br /&gt;
 |formfactor = ATX 12x8&amp;quot;&lt;br /&gt;
 |desc = ATX 12&amp;quot; x 8&amp;quot; form factor fits standard cases.&lt;br /&gt;
}}&lt;br /&gt;
&lt;br /&gt;
{{Board card&lt;br /&gt;
 |mfr = Supermicro&lt;br /&gt;
 |name = H8SCM&lt;br /&gt;
 |cpubrand = Opteron&lt;br /&gt;
 |image = H8SCM_Motherboard.png&lt;br /&gt;
 |socket = 1x C32&lt;br /&gt;
 |cores = 8&lt;br /&gt;
 |ram = 256GB ECC&lt;br /&gt;
 |formfactor = uATX 9.6x8.6&amp;quot;&lt;br /&gt;
 |desc = Smallest 15h Opteron board available - well-suited to networking and storage applications.&lt;br /&gt;
}}&lt;br /&gt;
&lt;br /&gt;
{{Board card&lt;br /&gt;
 |mfr = Supermicro&lt;br /&gt;
 |name = H8SML&lt;br /&gt;
 |cpubrand = Opteron&lt;br /&gt;
 |image = H8SML_Motherboard.png&lt;br /&gt;
 |socket = AM3+&lt;br /&gt;
 |cores = 8&lt;br /&gt;
 |ram = 32GB ECC&lt;br /&gt;
 |formfactor = uATX 9.6x9.6&amp;quot;&lt;br /&gt;
 |desc = The most power efficient 15h Opteron board available - capable of running 25W CPUs.&lt;br /&gt;
}}&lt;br /&gt;
&lt;br /&gt;
{{Board card&lt;br /&gt;
 |mfr = Lenovo&lt;br /&gt;
 |name = ThinkPad X140e&lt;br /&gt;
 |cpubrand = A4&lt;br /&gt;
 |image = X140e coreboot.png&lt;br /&gt;
 |socket = Kabini&lt;br /&gt;
 |cores = 4&lt;br /&gt;
 |ram = 16GB&lt;br /&gt;
 |formfactor = 11.6&amp;quot; Laptop&lt;br /&gt;
 |desc = Compact and efficient 11.6&amp;quot; laptop using a highly-integrated 16h Kabini APU.&lt;br /&gt;
}}&lt;br /&gt;
&lt;br /&gt;
{{Board card&lt;br /&gt;
 |mfr = Lenovo&lt;br /&gt;
 |name = G505s&lt;br /&gt;
 |cpubrand = A10&lt;br /&gt;
 |image = G505s.jpg&lt;br /&gt;
 |socket = FS1r2&lt;br /&gt;
 |cores = 4&lt;br /&gt;
 |ram = 32GB&lt;br /&gt;
 |formfactor = 15.6&amp;quot; Laptop&lt;br /&gt;
 |desc = Mainstream laptop with Piledriver APU and optional dGPU. Comprehensive FOSS firmware effort.&lt;br /&gt;
 |status = thirdparty&lt;br /&gt;
}}&lt;br /&gt;
&lt;br /&gt;
== Beta Support ==&lt;br /&gt;
coreboot ports for these boards may be complete enough to be used in a production setting, depending on your needs. Review the corresponding [[Motherboards|motherboard]] page for missing features, known bugs, or untested features.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
{{Board card&lt;br /&gt;
 |mfr = ASUS&lt;br /&gt;
 |name = Sabertooth 990FX R2.0&lt;br /&gt;
 |cpubrand = FX&lt;br /&gt;
 |image = Sabertooth_990FX_R2_Motherboard.png&lt;br /&gt;
 |socket = AM3+&lt;br /&gt;
 |cores = 8&lt;br /&gt;
 |ram = 64GB ECC&lt;br /&gt;
 |formfactor = ATX&lt;br /&gt;
 |desc = A gaming motherboard with high single core performance.&lt;br /&gt;
}}&lt;br /&gt;
&lt;br /&gt;
{{Board card&lt;br /&gt;
 |mfr = ASUS&lt;br /&gt;
 |name = F2A85-M&lt;br /&gt;
 |cpubrand = A10&lt;br /&gt;
 |image = F2A85-M.png&lt;br /&gt;
 |socket = FM2&lt;br /&gt;
 |cores = 4&lt;br /&gt;
 |ram = 32GB&lt;br /&gt;
 |formfactor = uATX 9.6x9.6&amp;quot;&lt;br /&gt;
 |desc = Inexpensive and efficient, reasonable single-thread performance.&lt;br /&gt;
 |status = beta&lt;br /&gt;
}}&lt;br /&gt;
&lt;br /&gt;
{{Board card&lt;br /&gt;
 |mfr = ASUS&lt;br /&gt;
 |name = A88XM-E&lt;br /&gt;
 |cpubrand = A10&lt;br /&gt;
 |image = A88XM-E.webp&lt;br /&gt;
 |socket = FM2&lt;br /&gt;
 |cores = 4&lt;br /&gt;
 |ram = 16GB&lt;br /&gt;
 |formfactor = uATX 8.9x7.4&amp;quot;&lt;br /&gt;
 |desc = Smaller than F2A85-M, with fewer RAM and PCIe slots. Socket also fits FM2+, coreboot supports FM2 only.&lt;br /&gt;
 |status = thirdparty&lt;br /&gt;
}}&lt;br /&gt;
&lt;br /&gt;
{{Board card&lt;br /&gt;
 |mfr = ASUS&lt;br /&gt;
 |name = AM1I-A&lt;br /&gt;
 |cpubrand = Athlon&lt;br /&gt;
 |image = AM1I-A.webp&lt;br /&gt;
 |socket = AM1&lt;br /&gt;
 |cores = 4&lt;br /&gt;
 |ram = 16GB&lt;br /&gt;
 |formfactor = Mini-ITX&lt;br /&gt;
 |desc = Small-form-factor motherboard for the highly-integrated AM1 platform (16h Kabini).&lt;br /&gt;
 |status = thirdparty&lt;br /&gt;
}}&lt;br /&gt;
&lt;br /&gt;
== Alpha Support ==&lt;br /&gt;
coreboot ports for these machines are capable of booting, but are missing important functionality and are unlikely to be suitable for non-development use. If you have one of these machines, consider helping test or develop [[coreboot-15h]] on it!&lt;br /&gt;
&lt;br /&gt;
{{Board card&lt;br /&gt;
 |mfr = Lenovo&lt;br /&gt;
 |name = ThinkPad E545&lt;br /&gt;
 |cpubrand = A10&lt;br /&gt;
 |image = ThinkPad E545.jpg&lt;br /&gt;
 |socket = FS1r2&lt;br /&gt;
 |cores = 4&lt;br /&gt;
 |ram = 32GB&lt;br /&gt;
 |formfactor = 15.6&amp;quot; Laptop&lt;br /&gt;
 |desc = Piledriver APU and optional dGPU.&lt;br /&gt;
 |status = alpha&lt;br /&gt;
}}&lt;br /&gt;
&lt;br /&gt;
{{Board card&lt;br /&gt;
 |mfr = Supermicro&lt;br /&gt;
 |name = H8DG6&lt;br /&gt;
 |cpubrand = Opteron&lt;br /&gt;
 |image = H8DGI.png&lt;br /&gt;
 |socket = 2x G34&lt;br /&gt;
 |cores = 32&lt;br /&gt;
 |ram = 512GB ECC&lt;br /&gt;
 |formfactor = SSI EEB&lt;br /&gt;
 |desc = Alternative to KGPE-D16 - theoretically more PCIe lanes, but some slots and BMC currently unsupported.&lt;br /&gt;
 |status = alpha&lt;br /&gt;
}}&lt;/div&gt;</summary>
		<author><name>Mrothfuss</name></author>
	</entry>
	<entry>
		<id>https://15h.org/index.php?title=Board_Grid&amp;diff=2920</id>
		<title>Board Grid</title>
		<link rel="alternate" type="text/html" href="https://15h.org/index.php?title=Board_Grid&amp;diff=2920"/>
		<updated>2026-06-22T02:13:02Z</updated>

		<summary type="html">&lt;p&gt;Mrothfuss: /* Alpha Support */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;== Stable Support ==&lt;br /&gt;
coreboot ports for these machines work with a wide range of peripherals (in some cases supporting more hardware than their stock firmware), have reliable hardware-based fan control, and have been deployed successfully by 15h.org community members. Review the corresponding [[Motherboards|motherboard]] page for any remaining missing or untested features. For source, see [https://git.15h.org/mrothfuss/coreboot-15h our git forge].&lt;br /&gt;
&lt;br /&gt;
{{Board card&lt;br /&gt;
 |mfr = ASUS&lt;br /&gt;
 |name = KGPE-D16&lt;br /&gt;
 |cpubrand = Opteron&lt;br /&gt;
 |image = Kgpe-d16.jpeg&lt;br /&gt;
 |socket = 2x G34&lt;br /&gt;
 |cores = 32&lt;br /&gt;
 |ram = 512GB ECC&lt;br /&gt;
 |formfactor = SSI EEB&lt;br /&gt;
 |desc = Popular choice among 15h users. BMC supports blob-free VGA and OpenBMC. Versatile I/O.&lt;br /&gt;
}}&lt;br /&gt;
&lt;br /&gt;
{{Board card&lt;br /&gt;
 |mfr = ASUS&lt;br /&gt;
 |name = KCMA-D8&lt;br /&gt;
 |cpubrand = Opteron&lt;br /&gt;
 |image = Asus-kcma-d8-top-64c7d3a66747d247126312.jpg&lt;br /&gt;
 |socket = 2x C32&lt;br /&gt;
 |cores = 16&lt;br /&gt;
 |ram = 512GB ECC&lt;br /&gt;
 |formfactor = SSI CEB&lt;br /&gt;
 |desc = Lower-power and more compact than KGPE-D16. BMC supports blob-free VGA and OpenBMC.&lt;br /&gt;
}}&lt;br /&gt;
&lt;br /&gt;
{{Board card&lt;br /&gt;
 |mfr = Supermicro&lt;br /&gt;
 |name = H8QG6&lt;br /&gt;
 |cpubrand = Opteron&lt;br /&gt;
 |image = H8QGi+-F_Motherboard.png&lt;br /&gt;
 |socket = 4x G34&lt;br /&gt;
 |cores = 64&lt;br /&gt;
 |ram = 1TB ECC&lt;br /&gt;
 |formfactor = SWTX&lt;br /&gt;
 |desc = The largest and most-performant board supported in coreboot-15h.&lt;br /&gt;
}}&lt;br /&gt;
&lt;br /&gt;
{{Board card&lt;br /&gt;
 |mfr = Supermicro&lt;br /&gt;
 |name = H8SGL&lt;br /&gt;
 |cpubrand = Opteron&lt;br /&gt;
 |image = H8SGL_Board.png&lt;br /&gt;
 |socket = 1x G34&lt;br /&gt;
 |cores = 16&lt;br /&gt;
 |ram = 256GB ECC&lt;br /&gt;
 |formfactor = ATX 12x8&amp;quot;&lt;br /&gt;
 |desc = ATX 12&amp;quot; x 8&amp;quot; form factor fits standard cases.&lt;br /&gt;
}}&lt;br /&gt;
&lt;br /&gt;
{{Board card&lt;br /&gt;
 |mfr = Supermicro&lt;br /&gt;
 |name = H8SCM&lt;br /&gt;
 |cpubrand = Opteron&lt;br /&gt;
 |image = H8SCM_Motherboard.png&lt;br /&gt;
 |socket = 1x C32&lt;br /&gt;
 |cores = 8&lt;br /&gt;
 |ram = 256GB ECC&lt;br /&gt;
 |formfactor = uATX 9.6x8.6&amp;quot;&lt;br /&gt;
 |desc = Smallest 15h Opteron board available - well-suited to networking and storage applications.&lt;br /&gt;
}}&lt;br /&gt;
&lt;br /&gt;
{{Board card&lt;br /&gt;
 |mfr = Supermicro&lt;br /&gt;
 |name = H8SML&lt;br /&gt;
 |cpubrand = Opteron&lt;br /&gt;
 |image = H8SML_Motherboard.png&lt;br /&gt;
 |socket = AM3+&lt;br /&gt;
 |cores = 8&lt;br /&gt;
 |ram = 32GB ECC&lt;br /&gt;
 |formfactor = uATX 9.6x9.6&amp;quot;&lt;br /&gt;
 |desc = The most power efficient 15h Opteron board available - capable of running 25W CPUs.&lt;br /&gt;
}}&lt;br /&gt;
&lt;br /&gt;
{{Board card&lt;br /&gt;
 |mfr = Lenovo&lt;br /&gt;
 |name = ThinkPad X140e&lt;br /&gt;
 |cpubrand = A4&lt;br /&gt;
 |image = X140e coreboot.png&lt;br /&gt;
 |socket = Kabini&lt;br /&gt;
 |cores = 4&lt;br /&gt;
 |ram = 16GB&lt;br /&gt;
 |formfactor = 11.6&amp;quot; Laptop&lt;br /&gt;
 |desc = Compact and efficient 11.6&amp;quot; laptop using a highly-integrated 16h Kabini APU.&lt;br /&gt;
}}&lt;br /&gt;
&lt;br /&gt;
{{Board card&lt;br /&gt;
 |mfr = Lenovo&lt;br /&gt;
 |name = G505s&lt;br /&gt;
 |cpubrand = A10&lt;br /&gt;
 |image = G505s.jpg&lt;br /&gt;
 |socket = FS1r2&lt;br /&gt;
 |cores = 4&lt;br /&gt;
 |ram = 32GB&lt;br /&gt;
 |formfactor = 15.6&amp;quot; Laptop&lt;br /&gt;
 |desc = Mainstream laptop with Piledriver APU and optional dGPU. Comprehensive FOSS firmware effort.&lt;br /&gt;
 |status = thirdparty&lt;br /&gt;
}}&lt;br /&gt;
&lt;br /&gt;
== Beta Support ==&lt;br /&gt;
coreboot ports for these boards may be complete enough to be used in a production setting, depending on your needs. Review the corresponding [[Motherboards|motherboard]] page for missing features, known bugs, or untested features.&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
{{Board card&lt;br /&gt;
 |mfr = ASUS&lt;br /&gt;
 |name = Sabertooth 990FX R2.0&lt;br /&gt;
 |cpubrand = FX&lt;br /&gt;
 |image = Sabertooth_990FX_R2_Motherboard.png&lt;br /&gt;
 |socket = AM3+&lt;br /&gt;
 |cores = 8&lt;br /&gt;
 |ram = 64GB ECC&lt;br /&gt;
 |formfactor = ATX&lt;br /&gt;
 |desc = A gaming motherboard with high single core performance.&lt;br /&gt;
}}&lt;br /&gt;
&lt;br /&gt;
{{Board card&lt;br /&gt;
 |mfr = ASUS&lt;br /&gt;
 |name = F2A85-M&lt;br /&gt;
 |cpubrand = A10&lt;br /&gt;
 |image = F2A85-M.png&lt;br /&gt;
 |socket = FM2&lt;br /&gt;
 |cores = 4&lt;br /&gt;
 |ram = 32GB&lt;br /&gt;
 |formfactor = uATX 9.6x9.6&amp;quot;&lt;br /&gt;
 |desc = Inexpensive and efficient, reasonable single-thread performance.&lt;br /&gt;
 |status = beta&lt;br /&gt;
}}&lt;br /&gt;
&lt;br /&gt;
{{Board card&lt;br /&gt;
 |mfr = ASUS&lt;br /&gt;
 |name = A88XM-E&lt;br /&gt;
 |cpubrand = A10&lt;br /&gt;
 |image = A88XM-E.webp&lt;br /&gt;
 |socket = FM2&lt;br /&gt;
 |cores = 4&lt;br /&gt;
 |ram = 16GB&lt;br /&gt;
 |formfactor = uATX 8.9x7.4&amp;quot;&lt;br /&gt;
 |desc = Smaller than F2A85-M, with fewer RAM and PCIe slots. Socket also fits FM2+, coreboot supports FM2 only.&lt;br /&gt;
 |status = thirdparty&lt;br /&gt;
}}&lt;br /&gt;
&lt;br /&gt;
{{Board card&lt;br /&gt;
 |mfr = ASUS&lt;br /&gt;
 |name = AM1I-A&lt;br /&gt;
 |cpubrand = Athlon&lt;br /&gt;
 |image = AM1I-A.webp&lt;br /&gt;
 |socket = AM1&lt;br /&gt;
 |cores = 4&lt;br /&gt;
 |ram = 16GB&lt;br /&gt;
 |formfactor = Mini-ITX&lt;br /&gt;
 |desc = Small-form-factor motherboard for the highly-integrated AM1 platform (16h Kabini).&lt;br /&gt;
 |status = thirdparty&lt;br /&gt;
}}&lt;br /&gt;
&lt;br /&gt;
== Alpha Support ==&lt;br /&gt;
coreboot ports for these machines are capable of booting, but are missing important functionality and are unlikely to be suitable for non-development use. If you have one of these machines, consider helping test or develop [[coreboot-15h]] on it!&lt;br /&gt;
&lt;br /&gt;
{{Board card&lt;br /&gt;
 |mfr = Lenovo&lt;br /&gt;
 |name = ThinkPad E545&lt;br /&gt;
 |cpubrand = A10&lt;br /&gt;
 |image = ThinkPad E545.jpg&lt;br /&gt;
 |socket = FS1r2&lt;br /&gt;
 |cores = 4&lt;br /&gt;
 |ram = 32GB&lt;br /&gt;
 |formfactor = 15.6&amp;quot; Laptop&lt;br /&gt;
 |desc = Piledriver APU and optional dGPU.&lt;br /&gt;
 |status = alpha&lt;br /&gt;
}}&lt;br /&gt;
&lt;br /&gt;
{{Board card&lt;br /&gt;
 |mfr = Supermicro&lt;br /&gt;
 |name = H8DG6&lt;br /&gt;
 |cpubrand = Opteron&lt;br /&gt;
 |image = H8DGI.png&lt;br /&gt;
 |socket = 2x G34&lt;br /&gt;
 |cores = 32&lt;br /&gt;
 |ram = 512GB ECC&lt;br /&gt;
 |formfactor = SSI EEB&lt;br /&gt;
 |desc = Alternative to KGPE-D16 - theoretically more PCIe lanes, but some slots and BMC currently unsupported.&lt;br /&gt;
 |status = alpha&lt;br /&gt;
}}&lt;/div&gt;</summary>
		<author><name>Mrothfuss</name></author>
	</entry>
	<entry>
		<id>https://15h.org/index.php?title=ASUS_Crosshair_V_Formula-Z&amp;diff=2919</id>
		<title>ASUS Crosshair V Formula-Z</title>
		<link rel="alternate" type="text/html" href="https://15h.org/index.php?title=ASUS_Crosshair_V_Formula-Z&amp;diff=2919"/>
		<updated>2026-06-22T02:12:05Z</updated>

		<summary type="html">&lt;p&gt;Mrothfuss: /* Open Source Firmware */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{{Infobox motherboard&lt;br /&gt;
  |image = Crosshair V Formula Z Motherboard.png&lt;br /&gt;
  |image_size = 300&lt;br /&gt;
&lt;br /&gt;
  |introduced = 2012&lt;br /&gt;
  |manufacturer = [[ASUS]]&lt;br /&gt;
&lt;br /&gt;
  |socket = 1x [[AM3+]]&lt;br /&gt;
  |northbridge = [[AMD 990FX]]&lt;br /&gt;
  |southbridge = [[AMD SB950]]&lt;br /&gt;
  |superio = ITE IT8721F&lt;br /&gt;
  |ram = 4 slots (2 channels) DDR3-1600 ECC UDIMM, up to 64GB&lt;br /&gt;
  |bios = 8 MiB socketed DIP-8 (W25Q64FVAIG)&lt;br /&gt;
  |formfactor = ATX&lt;br /&gt;
  |power = 1x 8-pin EPS&lt;br /&gt;
  &lt;br /&gt;
  |slot1 = PCIe Gen2 x16&lt;br /&gt;
  |slot2 = PCIe Gen2 x1&lt;br /&gt;
  |slot3 = PCIe Gen2 x16 (electrically x8)&lt;br /&gt;
  |slot4 = PCIe Gen2 x16&lt;br /&gt;
  |slot5 = PCIe Gen2 x1&lt;br /&gt;
  |slot6 = PCIe Gen2 x16 (electrically x4)&lt;br /&gt;
&lt;br /&gt;
  |serial = One internal&lt;br /&gt;
  |audio = Integrated ([[SB950]] HD Audio), ALC892 codec&lt;br /&gt;
}}&lt;br /&gt;
&lt;br /&gt;
The ASUS Crosshair V Formula-Z motherboard is under development.&lt;br /&gt;
&lt;br /&gt;
== Open Source Firmware ==&lt;br /&gt;
Open source firmware for the Crosshair V Formula-Z is provided by [[coreboot-15h]] utilizing AMD&#039;s open source AGESA and CIMx releases for platform initialization. The git repository for the firmware can be reviewed [https://git.15h.org/mrothfuss/coreboot-15h here].&lt;br /&gt;
&lt;br /&gt;
=== coreboot-15h ===&lt;br /&gt;
{{Excerpt|Coreboot-15h|[[ASUS Crosshair V Formula-Z]]|hat=no|bold=1}}&lt;br /&gt;
&lt;br /&gt;
=== Fan Output ===&lt;br /&gt;
The Crosshair V Formula-Z has three main fan zones: CPU, CHA, and OPT. The various fan headers on the motherboard are labeled accordingly. The CPU and CHA fan zones are controlled by the [ITE IT8721F]. The OPT fans are controlled by the EC. In [[coreboot-15h]], CPU fans are setup for PWM control and will respond to changes in CPU temperature. The CHA fans are setup for voltage control and will respond to both the CPU temperature and the [[990FX]] temperature. The OPT fans will operate at full speed.&lt;br /&gt;
&lt;br /&gt;
=== Missing Features ===&lt;br /&gt;
* Hibernation and Suspend/Resume are unsupported.&lt;br /&gt;
* CPUs using the K10 microarchitecture are unsupported.&lt;br /&gt;
&lt;br /&gt;
=== Flashing ===&lt;br /&gt;
To switch from the stock firmware to coreboot, [[External Flashing | external flashing]] is required. It is recommended to update the OEM BIOS to the latest version (2201) before switching to coreboot-15h, this will update the EC firmware to the latest version (GMED-0005). The DIP-8 flash chip is located between PCIE_X8_2 and PCIE_X16/X8_3 (labeled BIOS in the motherboard diagram). A 3.3V CH341a programmer can be used to flash coreboot onto the Crosshair V Formula-Z. When switching to coreboot-15h from the OEM BIOS, clearing the CMOS is required. The original DIP-8 flash chip requires the following flashrom argument:&lt;br /&gt;
&lt;br /&gt;
 &amp;lt;nowiki&amp;gt;&lt;br /&gt;
flashrom -c &amp;quot;W25Q64BV/W25Q64CV/W25Q64FV&amp;quot; &amp;lt;/nowiki&amp;gt;&lt;br /&gt;
&lt;br /&gt;
&#039;&#039;&#039;Clearing the CMOS&#039;&#039;&#039;&lt;br /&gt;
# Turn off the computer, disconnect the power cord and any powered peripherals (Monitors, USB devices, etc)&lt;br /&gt;
# Remove the CMOS battery&lt;br /&gt;
# Wait 20 seconds&lt;br /&gt;
# Reinstall the CMOS battery&lt;br /&gt;
# Connect the power cord&lt;br /&gt;
# Wait 2 minutes&lt;br /&gt;
# Turn on the motherboard&lt;br /&gt;
&lt;br /&gt;
&#039;&#039;&#039;CMOS Battery&#039;&#039;&#039;&lt;br /&gt;
&lt;br /&gt;
The motherboard requires a 3V CR2032 battery for reliable operation. Without a working CMOS battery, a two minute wait is always needed between connecting the motherboard to power and turning it on. This requirement is shared both by the OEM BIOS and coreboot-15h.&lt;br /&gt;
&lt;br /&gt;
== Motherboard Diagrams ==&lt;br /&gt;
[[File:Crosshair V Formula Z Motherboard Diagram.png|frameless|400x400px]]&lt;br /&gt;
&lt;br /&gt;
== Motherboard Components ==&lt;br /&gt;
=== Socket AM3+ ===&lt;br /&gt;
{{Excerpt|Socket AM3+|inline=yes|bold=yes}}&lt;br /&gt;
==== AMD Opteron 3200 and 3300 Series ====&lt;br /&gt;
{{Excerpt|AMD Opteron 3200 and 3300 Series|inline=yes|bold=yes}}&lt;br /&gt;
=== DDR3 Memory ===&lt;br /&gt;
[[File:Sabertooth 990FX R2 RAM Layout.png|frameless|1000x1000px]]&lt;br /&gt;
=== PCIe 2.0 Slots ===&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
|+&lt;br /&gt;
!Slot&lt;br /&gt;
!Width&lt;br /&gt;
!Wired Lanes&lt;br /&gt;
!Notes&lt;br /&gt;
|-&lt;br /&gt;
|PCIE_X16_1&lt;br /&gt;
|x16&lt;br /&gt;
|x16&lt;br /&gt;
|&lt;br /&gt;
|-&lt;br /&gt;
|PCIEX1_1&lt;br /&gt;
|x1&lt;br /&gt;
|x1&lt;br /&gt;
|Wired to the SB950 &lt;br /&gt;
|-&lt;br /&gt;
|PCIE_X8_2&lt;br /&gt;
|x16&lt;br /&gt;
|x8&lt;br /&gt;
|Disables if no card is detected.&lt;br /&gt;
|-&lt;br /&gt;
|PCIEX1_2&lt;br /&gt;
|x1&lt;br /&gt;
|x1&lt;br /&gt;
|Wired to the SB950&lt;br /&gt;
|-&lt;br /&gt;
|PCIE_X16/X8_3&lt;br /&gt;
|x16&lt;br /&gt;
|x8 or x16&lt;br /&gt;
|Switches to x16 mode if PCIE_X8_2 is empty.&lt;br /&gt;
|-&lt;br /&gt;
|PCIE_X4_4&lt;br /&gt;
|x16&lt;br /&gt;
|x4&lt;br /&gt;
|&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
=== AMD 990FX ===&lt;br /&gt;
{{Excerpt|AMD 990FX|inline=yes|bold=yes}}&lt;br /&gt;
=== AMD SB950 ===&lt;br /&gt;
{{Excerpt|AMD SB950|inline=yes|bold=yes}}&lt;br /&gt;
=== ITE IT8721F ===&lt;br /&gt;
{{Excerpt|ITE IT8721F|hat=no}}&lt;/div&gt;</summary>
		<author><name>Mrothfuss</name></author>
	</entry>
	<entry>
		<id>https://15h.org/index.php?title=Coreboot-15h&amp;diff=2918</id>
		<title>Coreboot-15h</title>
		<link rel="alternate" type="text/html" href="https://15h.org/index.php?title=Coreboot-15h&amp;diff=2918"/>
		<updated>2026-06-22T02:10:00Z</updated>

		<summary type="html">&lt;p&gt;Mrothfuss: /* Stable */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{{lowercase title}}&lt;br /&gt;
&lt;br /&gt;
&#039;&#039;&#039;coreboot-15h&#039;&#039;&#039;, also known as &#039;&#039;&#039;Mike&#039;s coreboot&#039;&#039;&#039;, is a distribution of [[coreboot]] for various [[Family 15h]] motherboards, developed by [[User:Mrothfuss|mrothfuss]], using AMD&#039;s open-source fam15h AGESA and CIMX for initialization. This has allowed for the reintroduction of several boards long-deprecated upstream (such as the [[H8QGi+-F]]), and has allowed several previously-unsupported Family 15h boards (particularly others from [[Supermicro]]) to be ported. On [[ASUS]] boards that were once supported by [[Raptor Engineering]]&#039;s native initialization implementation (removed upstream in coreboot 4.12), coreboot-15h offers improved reliability and hardware compatibility over upstream coreboot 4.11 and [[Dasharo]] 0.4.0. Improvements include dramatically more reliable memory initialization (including support for more memory and denser modules), improved stability once booted, significantly improved HyperTransport configuration, native support for hardware monitoring and fan control, and patches to the build system to allow building on modern platforms. It is, at the time of writing, believed to be the most stable and complete coreboot variant available for the hardware it targets, and it currently appears to be the only actively-developed coreboot variant supporting family 15h.&lt;br /&gt;
&lt;br /&gt;
== History ==&lt;br /&gt;
&lt;br /&gt;
Attempts were made in 2022 to complete the [[Raptor Engineering]] port of coreboot for the [[KGPE-D16|ASUS KGPE-D16]] motherboard. This involved an effort by [[User:Mrothfuss|mrothfuss]] to fix bugs in the previous 4.11 codebase&amp;lt;ref&amp;gt;https://github.com/mrothfuss/coreboot-D16 coreboot-D16&amp;lt;/ref&amp;gt; and development by [[Dasharo]] to migrate the platform to coreboot 4.15&amp;lt;ref&amp;gt;https://docs.dasharo.com/variants/asus_kgpe_d16/overview/&amp;lt;/ref&amp;gt;. Improvements made by [[User:Mrothfuss|mrothfuss]] were upstreamed to [[Dasharo]]&#039;s fork&amp;lt;ref&amp;gt;https://github.com/Dasharo/coreboot/pull/116&amp;lt;/ref&amp;gt;. Both efforts ultimately failed to produce reliable firmware for the [[KGPE-D16|ASUS KGPE-D16]] motherboard.&lt;br /&gt;
&lt;br /&gt;
Initial testing and development of AMD&#039;s open source AGESA/CIMx codebases by [[User:Mrothfuss|mrothfuss]] began in 2023 as a fork of coreboot 4.0 called [https://github.com/mrothfuss/coreboot-agesa coreboot-agesa]. Support for AMD Fam15 on the existing [[Supermicro]] [[H8SCM]] and [[H8QGi%2B-F]] motherboards was confirmed and improved. A new port for the [[H8DGi]] was successfully made using this codebase, providing a reliable and performant dual socket G34 motherboard similar to the [[KGPE-D16|ASUS KGPE-D16]]. Compilation of this old source code, however, required an inconvenient Debian 6 environment.&lt;br /&gt;
&lt;br /&gt;
In early 2025, the AGESA/CIMx codebases were successfully reintegrated into coreboot 4.11 under the [[coreboot-15h]] project. Initially the previous [[Supermicro]] motherboards ([[H8QGi%2B-F]], [[H8DGi]], [[H8SCM]]) were supported. New AGESA/CIMx ports for the [[ASUS]] motherboards, [[KGPE-D16]] and [[KCMA-D8]], were developed and tested by [[User:Mrothfuss|mrothfuss]] and [[User:Rane|rane]]. Integration of the AGESA/CIMx codebase into coreboot was subsequently improved, namely adding IOMMU support for AMD Fam15 motherboards. At this point, [[coreboot-15h]] surpassed all other firmware options for the supported motherboards; providing more features, better multicore performance, better power efficiency, and speculative-execution mitigation support.&lt;br /&gt;
&lt;br /&gt;
== Branches ==&lt;br /&gt;
[[coreboot-15h]] has two main branches, 4.11_branch and 4.18_branch. The two branches support different AMD architectures.&lt;br /&gt;
&lt;br /&gt;
&#039;&#039;&#039;4.11_branch&#039;&#039;&#039;&lt;br /&gt;
* Bulldozer and Piledriver&lt;br /&gt;
&#039;&#039;&#039;4.18_branch&#039;&#039;&#039;&lt;br /&gt;
* Trinity and Richland&lt;br /&gt;
* Jaguar&lt;br /&gt;
&lt;br /&gt;
Development of the two branches is organized into three main categories.&lt;br /&gt;
&lt;br /&gt;
&#039;&#039;&#039;release candidate (rc):&#039;&#039;&#039; The final round of testing on hardware occurs on this branch before merging into the main branches.&lt;br /&gt;
* 4.11_branch-rc&lt;br /&gt;
* 4.18_branch-rc&lt;br /&gt;
&lt;br /&gt;
&#039;&#039;&#039;staging:&#039;&#039;&#039; Where completed features/changes accumulate before more rigorous validation. Code in the staging branches should be stable and reliable.&lt;br /&gt;
* 4.11_staging&lt;br /&gt;
* 4.18_staging&lt;br /&gt;
&lt;br /&gt;
&#039;&#039;&#039;work in progress (wip):&#039;&#039;&#039; Feature branches (ie: 4.11_wip-atombios-runner) where volatile/experimental changes are made. These are typically squashed into staging as a single commit once complete.&lt;br /&gt;
&lt;br /&gt;
== Compiling coreboot from source ==&lt;br /&gt;
Compilation has been tested on Debian 12 and FreeBSD 14.2. Building on FreeBSD is the same as building on Linux, but &#039;make&#039; is replaced with &#039;gmake&#039;.&lt;br /&gt;
&lt;br /&gt;
&#039;&#039;&#039;Tested GCC Versions&#039;&#039;&#039;&lt;br /&gt;
* GCC12 Works&lt;br /&gt;
* GCC14 Fails, run-time errors.&lt;br /&gt;
* GCC15 Fails, compile-time errors.&lt;br /&gt;
&lt;br /&gt;
&#039;&#039;&#039;Debian 12 Dependencies&#039;&#039;&#039;&lt;br /&gt;
&lt;br /&gt;
 &lt;br /&gt;
 apt install git build-essential m4 bison flex zlib1g-dev libncurses-dev imagemagick python-is-python3 gnat libssl-dev pkg-config curl&lt;br /&gt;
  &lt;br /&gt;
&lt;br /&gt;
&#039;&#039;&#039;FreeBSD 14.2 Dependencies&#039;&#039;&#039;&lt;br /&gt;
&lt;br /&gt;
 &amp;lt;nowiki&amp;gt;&lt;br /&gt;
### This list may be incomplete&lt;br /&gt;
pkg install git bash gmake gcc12 m4 bison ImageMagick7  python autoconf automake gettext-tools gnu-unifont&lt;br /&gt;
 &amp;lt;/nowiki&amp;gt;&lt;br /&gt;
&lt;br /&gt;
&#039;&#039;&#039;Configuring and Compiling&#039;&#039;&#039;&lt;br /&gt;
&lt;br /&gt;
 &amp;lt;nowiki&amp;gt;&lt;br /&gt;
### Fetch coreboot-15h source&lt;br /&gt;
# Tip: Add the &#039;--depth=1&#039; argument to save bandwidth. You&lt;br /&gt;
#      will not be able to checkout previous commits if you&lt;br /&gt;
#      use this shallow clone option.&lt;br /&gt;
git clone https://git.15h.org/mrothfuss/coreboot-15h.git&lt;br /&gt;
cd coreboot-15h&lt;br /&gt;
&lt;br /&gt;
### Optional: Checkout a specific commit to reproduce a release&lt;br /&gt;
# git commit-id&#039;s are included at the end of a release name&lt;br /&gt;
# Example: 2025.11.09-v4.11-6f1fd5cf220&lt;br /&gt;
git checkout 6f1fd5cf220&lt;br /&gt;
&lt;br /&gt;
### Optional: Fetch blobs (required for VGABIOS ROMs)&lt;br /&gt;
# Blobs can be explicitly excluded from the build by menuconfig&lt;br /&gt;
# Tip: Add the &#039;--depth=1&#039; argument to save bandwidth&lt;br /&gt;
git submodule update --init --checkout 3rdparty/blobs&lt;br /&gt;
&lt;br /&gt;
### Optional: Manually fetch the vboot submodule&lt;br /&gt;
# This submodule will be fetched automatically, but needs to be&lt;br /&gt;
# manually downloaded if you want to use the &#039;UPDATED_SUBMODULES=1&#039;&lt;br /&gt;
# option during the coreboot.rom compilation (see below).&lt;br /&gt;
# Tip: Add the &#039;--depth=1&#039; argument to save bandwidth&lt;br /&gt;
git submodule update --init --checkout 3rdparty/vboot&lt;br /&gt;
&lt;br /&gt;
### Build the cross compiler (may take a while)&lt;br /&gt;
make crossgcc-i386 CPUS=$(nproc)&lt;br /&gt;
&lt;br /&gt;
### Select a config template from ./configs&lt;br /&gt;
# These config files are used to compile the releases distributed on 15h.org&lt;br /&gt;
# Copy the config you want to start with, you can adjust it in the next step&lt;br /&gt;
cp configs/config.asus_kgpe-d16_seabios_ucode_ast2050-oprom_vga-oproms_2mb .config&lt;br /&gt;
&lt;br /&gt;
### Optional: Review or adjust your configuration&lt;br /&gt;
make menuconfig&lt;br /&gt;
&lt;br /&gt;
### Build coreboot, your ROM will be at ./build/coreboot.rom&lt;br /&gt;
# Tip: Add the &#039;UPDATED_SUBMODULES=1&#039; argument to skip fetching/updating all submodules&lt;br /&gt;
make&lt;br /&gt;
&amp;lt;/nowiki&amp;gt;&lt;br /&gt;
&lt;br /&gt;
&#039;&#039;&#039;Listing Source Files&#039;&#039;&#039;&lt;br /&gt;
&lt;br /&gt;
To review a precise list of files compiled into your ./build/coreboot.rom file, use this command.&lt;br /&gt;
 &amp;lt;nowiki&amp;gt;&lt;br /&gt;
make filelist&amp;lt;/nowiki&amp;gt;&lt;br /&gt;
&lt;br /&gt;
This command works after a successful &#039;make&#039; and changes depending on the motherboard and configuration options selected.&lt;br /&gt;
&lt;br /&gt;
&#039;&#039;&#039;Fetching Updates&#039;&#039;&#039;&lt;br /&gt;
&lt;br /&gt;
 &amp;lt;nowiki&amp;gt;&lt;br /&gt;
git pull&amp;lt;/nowiki&amp;gt;&lt;br /&gt;
&lt;br /&gt;
&#039;&#039;&#039;Switching Motherboards&#039;&#039;&#039;&lt;br /&gt;
&lt;br /&gt;
If you want to switch motherboards, you must first clean the build environment. Afterwards, continue from the config selection step.&lt;br /&gt;
 &amp;lt;nowiki&amp;gt;&lt;br /&gt;
make distclean&amp;lt;/nowiki&amp;gt;&lt;br /&gt;
&lt;br /&gt;
== License ==&lt;br /&gt;
&lt;br /&gt;
Because of the way coreboot began, using a significant amount of source code from the Linux kernel, it&#039;s licensed the same way as the Linux Kernel, with GNU General Public License (GPL) Version 2. Individual files are licensed under various licenses, though all are compatible with GPLv2. Exceptions are listed below.&lt;br /&gt;
&lt;br /&gt;
Files under coreboot/Documentation/ are licensed under CC-BY 4.0 terms. As an exception, files under Documentation/ with a history older than 2017-05-24 might be under different licenses.&lt;br /&gt;
&lt;br /&gt;
Files in the coreboot/src/commonlib/bsd directory are all licensed with the BSD-3-clause license. Many are also dual-licensed GPL-2.0-only or GPL-2.0-or-later. These files are intended to be shared with libpayload or other BSD licensed projects.&lt;br /&gt;
&lt;br /&gt;
Source code in the coreboot/src/vendorcode/amd directory is licensed with the BSD-3-clause license. Certain microcode updates ship with a more restricted license described within each microcode patch file.&lt;br /&gt;
&lt;br /&gt;
The libpayload project contained in coreboot/payloads/libpayload may be licensed as BSD or GPL, depending on the code pulled in during the build process. All GPL source code should be excluded unless the Kconfig option to include it is set.&lt;br /&gt;
&lt;br /&gt;
Firmware images released by the coreboot-15h project are shipped with the necessary licenses within the associated tarball.&lt;br /&gt;
&lt;br /&gt;
==Stable==&lt;br /&gt;
&lt;br /&gt;
=== [[ASUS Crosshair V Formula-Z]] ===&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
| {{center|&#039;&#039;&#039;Release&#039;&#039;&#039;}}&lt;br /&gt;
| {{center|&#039;&#039;&#039;Notes&#039;&#039;&#039;}}&lt;br /&gt;
| {{center|&#039;&#039;&#039;Download Options&#039;&#039;&#039;}}&lt;br /&gt;
|-&lt;br /&gt;
|2026.05.27-v4.11-57e26bdcd95&lt;br /&gt;
|&lt;br /&gt;
* Initial v4.11 AGESA release&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/1/1c/Coreboot-15h_2026.05.27-v4.11-57e26bdcd95_asus_crosshair-v-formula-z_seabios_ucode_vga-oproms_8mb.tar.gz 8MB]&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
=== [[ASUS KCMA-D8]] ===&lt;br /&gt;
Supported motherboard variants: &lt;br /&gt;
* &#039;&#039;&#039;KCMA-D8&#039;&#039;&#039; (Serial Numbers B9S2xxxxxxxx and up)&lt;br /&gt;
Unsupported motherboard variants:&lt;br /&gt;
* &#039;&#039;&#039;KCMA-D8&#039;&#039;&#039; (Serial Numbers B8S2xxxxxxxx and below)&lt;br /&gt;
** These old boards only work with 4100 series Opterons&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
| {{center|&#039;&#039;&#039;Release&#039;&#039;&#039;}}&lt;br /&gt;
| {{center|&#039;&#039;&#039;Notes&#039;&#039;&#039;}}&lt;br /&gt;
| {{center|&#039;&#039;&#039;Download Options&#039;&#039;&#039;}}&lt;br /&gt;
|-&lt;br /&gt;
|2026.05.04-v4.11-5d336ff7176&lt;br /&gt;
|&lt;br /&gt;
* Improved power efficiency&lt;br /&gt;
* Improved SATA performance&lt;br /&gt;
* Improved thermal management&lt;br /&gt;
* Enabled PCIe ASPM support&lt;br /&gt;
* Enabled the Power LED&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/c/c0/Coreboot-15h_2026.05.04-v4.11-5d336ff7176_asus_kcma-d8_seabios_ucode_ast2050-oprom_vga-oproms_2mb.tar.gz 2MB]&lt;br /&gt;
* SeaBIOS + uCode (text-mode)&lt;br /&gt;
** [https://15h.org/images/7/71/Coreboot-15h_2026.05.04-v4.11-5d336ff7176_asus_kcma-d8_seabios_ucode_no-oproms_2mb.tar.gz 2MB]&lt;br /&gt;
* SeaBIOS (text-mode, blob-free)&lt;br /&gt;
** [https://15h.org/images/e/ed/Coreboot-15h_2026.05.04-v4.11-5d336ff7176_asus_kcma-d8_seabios_no-ucode_no-oproms_2mb.tar.gz 2MB]&lt;br /&gt;
|-&lt;br /&gt;
|2025.12.17-v4.11-582d6f37158&lt;br /&gt;
|&lt;br /&gt;
* Fixed support for the BMC module&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/6/68/Coreboot-15h_2025.12.17-v4.11-582d6f37158_asus_kcma-d8_seabios_ucode_ast2050-oprom_vga-oproms_2mb.tar.gz 2MB]&lt;br /&gt;
* SeaBIOS + uCode (text-mode)&lt;br /&gt;
** [https://15h.org/images/a/a5/Coreboot-15h_2025.12.17-v4.11-582d6f37158_asus_kcma-d8_seabios_ucode_no-oproms_2mb.tar.gz 2MB]&lt;br /&gt;
* SeaBIOS (text-mode, blob-free)&lt;br /&gt;
** [https://15h.org/images/7/70/Coreboot-15h_2025.12.17-v4.11-582d6f37158_asus_kcma-d8_seabios_no-ucode_no-oproms_2mb.tar.gz 2MB]&lt;br /&gt;
|-&lt;br /&gt;
|2025.12.08-v4.11-4bb1cd46931&lt;br /&gt;
|&lt;br /&gt;
* Enabled COM2&lt;br /&gt;
* Fixed COM1/COM2 ACPI Entries&lt;br /&gt;
** Improves OS detection of COM1/COM2 ports&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/e/e9/Coreboot-15h_2025.12.08-v4.11-4bb1cd46931_asus_kcma-d8_seabios_ucode_ast2050-oprom_vga-oproms_2mb.tar.gz 2MB]&lt;br /&gt;
* SeaBIOS + uCode (text-mode)&lt;br /&gt;
** [https://15h.org/images/d/db/Coreboot-15h_2025.12.08-v4.11-4bb1cd46931_asus_kcma-d8_seabios_ucode_no-oproms_2mb.tar.gz 2MB]&lt;br /&gt;
* SeaBIOS (text-mode, blob-free)&lt;br /&gt;
** [https://15h.org/images/a/a8/Coreboot-15h_2025.12.08-v4.11-4bb1cd46931_asus_kcma-d8_seabios_no-ucode_no-oproms_2mb.tar.gz 2MB]&lt;br /&gt;
|-&lt;br /&gt;
|2025.11.11-v4.11-61cbef5bdd2&lt;br /&gt;
|&lt;br /&gt;
* Initial v4.11 AGESA release&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/4/4f/Coreboot-15h_2025.11.11-v4.11-61cbef5bdd2_asus_kcma-d8_seabios_ucode_ast2050-oprom_vga-oproms_2mb.tar.gz 2MB]&lt;br /&gt;
* SeaBIOS + uCode (text-mode)&lt;br /&gt;
** [https://15h.org/images/f/f5/Coreboot-15h_2025.11.11-v4.11-61cbef5bdd2_asus_kcma-d8_seabios_ucode_no-oproms_2mb.tar.gz 2MB]&lt;br /&gt;
* SeaBIOS (text-mode, blob-free)&lt;br /&gt;
** [https://15h.org/images/4/48/Coreboot-15h_2025.11.11-v4.11-61cbef5bdd2_asus_kcma-d8_seabios_no-ucode_no-oproms_2mb.tar.gz 2MB]&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
=== [[ASUS KGPE-D16]] ===&lt;br /&gt;
Supported motherboard variants: &lt;br /&gt;
* &#039;&#039;&#039;KGPE-D16&#039;&#039;&#039;&lt;br /&gt;
* &#039;&#039;&#039;KGPE-D16/CHN&#039;&#039;&#039;&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
| {{center|&#039;&#039;&#039;Release&#039;&#039;&#039;}}&lt;br /&gt;
| {{center|&#039;&#039;&#039;Notes&#039;&#039;&#039;}}&lt;br /&gt;
| {{center|&#039;&#039;&#039;Download Options&#039;&#039;&#039;}}&lt;br /&gt;
|-&lt;br /&gt;
|2026.05.04-v4.11-5d336ff7176&lt;br /&gt;
|&lt;br /&gt;
* Improved power efficiency&lt;br /&gt;
* Improved SATA performance&lt;br /&gt;
* Improved thermal management&lt;br /&gt;
* Enabled PCIe ASPM support&lt;br /&gt;
* Enabled the Power LED&lt;br /&gt;
* Enabled TPM support&lt;br /&gt;
** TPM 1.2 and 2.0 are supported&lt;br /&gt;
** TPM 2.0 is enabled by default&lt;br /&gt;
** TPM measured boot is supported&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/3/34/Coreboot-15h_2026.05.04-v4.11-5d336ff7176_asus_kgpe-d16_seabios_ucode_ast2050-oprom_vga-oproms_2mb.tar.gz 2MB]&lt;br /&gt;
* SeaBIOS + uCode (text-mode)&lt;br /&gt;
** [https://15h.org/images/7/72/Coreboot-15h_2026.05.04-v4.11-5d336ff7176_asus_kgpe-d16_seabios_ucode_no-oproms_2mb.tar.gz 2MB]&lt;br /&gt;
* SeaBIOS (text-mode, blob-free)&lt;br /&gt;
** [https://15h.org/images/9/9b/Coreboot-15h_2026.05.04-v4.11-5d336ff7176_asus_kgpe-d16_seabios_no-ucode_no-oproms_2mb.tar.gz 2MB]&lt;br /&gt;
|-&lt;br /&gt;
|2025.12.17-v4.11-582d6f37158&lt;br /&gt;
|&lt;br /&gt;
* Fixed support for the BMC module&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/7/7b/Coreboot-15h_2025.12.17-v4.11-582d6f37158_asus_kgpe-d16_seabios_ucode_ast2050-oprom_vga-oproms_2mb.tar.gz 2MB]&lt;br /&gt;
* SeaBIOS + uCode (text-mode)&lt;br /&gt;
** [https://15h.org/images/4/4e/Coreboot-15h_2025.12.17-v4.11-582d6f37158_asus_kgpe-d16_seabios_ucode_no-oproms_2mb.tar.gz 2MB]&lt;br /&gt;
* SeaBIOS (text-mode, blob-free)&lt;br /&gt;
** [https://15h.org/images/d/d9/Coreboot-15h_2025.12.17-v4.11-582d6f37158_asus_kgpe-d16_seabios_no-ucode_no-oproms_2mb.tar.gz 2MB]&lt;br /&gt;
|-&lt;br /&gt;
|2025.12.08-v4.11-4bb1cd46931&lt;br /&gt;
|&lt;br /&gt;
* Added x16 support for PCIe Slot 4&lt;br /&gt;
** PCIe 4 Switches to x16 mode if PCIe 5 is empty&lt;br /&gt;
* Enabled COM2&lt;br /&gt;
* Fixed COM1/COM2 ACPI Entries&lt;br /&gt;
** Improves OS detection of COM1/COM2 ports&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/6/65/Coreboot-15h_2025.12.08-v4.11-4bb1cd46931_asus_kgpe-d16_seabios_ucode_ast2050-oprom_vga-oproms_2mb.tar.gz 2MB]&lt;br /&gt;
* SeaBIOS + uCode (text-mode)&lt;br /&gt;
** [https://15h.org/images/5/54/Coreboot-15h_2025.12.08-v4.11-4bb1cd46931_asus_kgpe-d16_seabios_ucode_no-oproms_2mb.tar.gz 2MB]&lt;br /&gt;
* SeaBIOS (text-mode, blob-free)&lt;br /&gt;
** [https://15h.org/images/0/0c/Coreboot-15h_2025.12.08-v4.11-4bb1cd46931_asus_kgpe-d16_seabios_no-ucode_no-oproms_2mb.tar.gz 2MB]&lt;br /&gt;
|-&lt;br /&gt;
|2025.11.09-v4.11-6f1fd5cf220&lt;br /&gt;
|&lt;br /&gt;
* Optimized HyperTransport Speed and Deemphasis&lt;br /&gt;
* Optimized RAM Power Saving&lt;br /&gt;
* Optimized RAM ECC Scrub Rates&lt;br /&gt;
* Setup Thermal Throttling&lt;br /&gt;
* Enabled Thermal Shutdown&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/9/9c/Coreboot-15h_2025.11.09-v4.11-6f1fd5cf220_asus_kgpe-d16_seabios_ucode_ast2050-oprom_vga-oproms_2mb.tar.gz 2MB]&lt;br /&gt;
* SeaBIOS + uCode (text-mode)&lt;br /&gt;
** [https://15h.org/images/8/86/Coreboot-15h_2025.11.09-v4.11-6f1fd5cf220_asus_kgpe-d16_seabios_ucode_no-oproms_2mb.tar.gz 2MB]&lt;br /&gt;
* SeaBIOS (text-mode, blob-free)&lt;br /&gt;
** [https://15h.org/images/4/4c/Coreboot-15h_2025.11.09-v4.11-6f1fd5cf220_asus_kgpe-d16_seabios_no-ucode_no-oproms_2mb.tar.gz 2MB]&lt;br /&gt;
|-&lt;br /&gt;
|2025.10.31-v4.11-c71dd7896fe&lt;br /&gt;
|&lt;br /&gt;
* Enabled the IOMMU&lt;br /&gt;
* Enabled the HPET&lt;br /&gt;
* Added coreinfo and memtest&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/0/0b/Coreboot-15h_2025.10.31-v4.11-c71dd7896fe_asus_kgpe-d16_seabios_ucode_ast2050-oprom_vga-oproms_2mb.tar.gz 2MB]&lt;br /&gt;
* SeaBIOS + uCode (text-mode)&lt;br /&gt;
** [https://15h.org/images/f/f9/Coreboot-15h_2025.10.31-v4.11-c71dd7896fe_asus_kgpe-d16_seabios_ucode_no-oproms_2mb.tar.gz 2MB]&lt;br /&gt;
* SeaBIOS (text-mode, blob-free)&lt;br /&gt;
** [https://15h.org/images/2/22/Coreboot-15h_2025.10.31-v4.11-c71dd7896fe_asus_kgpe-d16_seabios_no-ucode_no-oproms_2mb.tar.gz 2MB]&lt;br /&gt;
|-&lt;br /&gt;
|2025.10.11-v4.11-63a34806baf &lt;br /&gt;
|&lt;br /&gt;
* Added support for microcode removal&lt;br /&gt;
* Created configs with blobs removed&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/1/16/Coreboot-15h_2025.10.11-v4.11-63a34806baf_asus_kgpe-d16_seabios_ucode_ast2050-oprom_vga-oproms_2mb.tar.gz 2MB]&lt;br /&gt;
* SeaBIOS + uCode (text-mode)&lt;br /&gt;
** [https://15h.org/images/2/27/Coreboot-15h_2025.10.11-v4.11-63a34806baf_asus_kgpe-d16_seabios_ucode_no-oproms_2mb.tar.gz 2MB]&lt;br /&gt;
* SeaBIOS (text-mode, blob-free)&lt;br /&gt;
** [https://15h.org/images/8/89/Coreboot-15h_2025.10.11-v4.11-63a34806baf_asus_kgpe-d16_seabios_no-ucode_no-oproms_2mb.tar.gz 2MB]&lt;br /&gt;
|-&lt;br /&gt;
|2025.10.10-v4.11-a99acc20d4a&lt;br /&gt;
|&lt;br /&gt;
* Initial v4.11 AGESA release&lt;br /&gt;
** Robust support for all DIMM slots&lt;br /&gt;
*** up to 32GB RDIMMs supported&lt;br /&gt;
*** up to 64GB LRDIMMs supported&lt;br /&gt;
** Up to 4 PCIe cards supported&lt;br /&gt;
** Native fan control&lt;br /&gt;
** Latest microcode&lt;br /&gt;
** IOMMU is disabled&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/6/6c/Coreboot-15h_2025.10.10-v4.11-a99acc20d4a_asus_kgpe-d16_seabios_ucode_ast2050-oprom_vga-oproms_2mb.tar.gz 2MB]&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
=== [[Supermicro H8SML]] ===&lt;br /&gt;
Supported motherboard variants:&lt;br /&gt;
* &#039;&#039;&#039;H8SML-i&#039;&#039;&#039;&lt;br /&gt;
* &#039;&#039;&#039;H8SML-iF&#039;&#039;&#039;&lt;br /&gt;
* &#039;&#039;&#039;H8SML-7&#039;&#039;&#039;&lt;br /&gt;
* &#039;&#039;&#039;H8SML-7F&#039;&#039;&#039;&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
| {{center|&#039;&#039;&#039;Release&#039;&#039;&#039;}}&lt;br /&gt;
| {{center|&#039;&#039;&#039;Notes&#039;&#039;&#039;}}&lt;br /&gt;
| {{center|&#039;&#039;&#039;Download Options&#039;&#039;&#039;}}&lt;br /&gt;
|-&lt;br /&gt;
|2026.05.04-v4.11-5d336ff7176&lt;br /&gt;
|&lt;br /&gt;
* Initial v4.11 AGESA release&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/5/53/Coreboot-15h_2026.05.04-v4.11-5d336ff7176_supermicro_h8sml_seabios_ucode_matrox-oprom_vga-oproms.tar.gz 2MB]&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
=== [[Supermicro H8SCM]] ===&lt;br /&gt;
Supported motherboard variants:&lt;br /&gt;
* &#039;&#039;&#039;H8SCM&#039;&#039;&#039;&lt;br /&gt;
* &#039;&#039;&#039;H8SCM-F&#039;&#039;&#039;&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
| {{center|&#039;&#039;&#039;Release&#039;&#039;&#039;}}&lt;br /&gt;
| {{center|&#039;&#039;&#039;Notes&#039;&#039;&#039;}}&lt;br /&gt;
| {{center|&#039;&#039;&#039;Download Options&#039;&#039;&#039;}}&lt;br /&gt;
|-&lt;br /&gt;
|2026.05.04-v4.11-5d336ff7176&lt;br /&gt;
|&lt;br /&gt;
* Improved power efficiency&lt;br /&gt;
* Improved SATA performance&lt;br /&gt;
* Improved thermal management&lt;br /&gt;
* Enabled PCIe ASPM support&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/5/5e/Coreboot-15h_2026.05.04-v4.11-5d336ff7176_supermicro_h8scm_seabios_ucode_matrox-oprom_vga-oproms.tar.gz 2MB]&lt;br /&gt;
|-&lt;br /&gt;
|2025.11.18-v4.11-4094163932a&lt;br /&gt;
|&lt;br /&gt;
* Partial UART support&lt;br /&gt;
** Requires the BMC to be online&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/c/c7/Coreboot-15h_2025.11.18-v4.11-4094163932a_supermicro_h8scm_seabios_ucode_matrox-oprom_vga-oproms.tar.gz 2MB]&lt;br /&gt;
|-&lt;br /&gt;
|2025.11.11-v4.11-61cbef5bdd2&lt;br /&gt;
|&lt;br /&gt;
* Minor bug fixes relating to the C32 socket&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/a/ab/Coreboot-15h_2025.11.11-v4.11-61cbef5bdd2_supermicro_h8scm_seabios_ucode_matrox-oprom_vga-oproms.tar.gz 2MB]&lt;br /&gt;
|-&lt;br /&gt;
|2025.11.09-v4.11-6f1fd5cf220&lt;br /&gt;
|&lt;br /&gt;
* Optimized HyperTransport Speed and Deemphasis&lt;br /&gt;
* Optimized RAM Power Saving&lt;br /&gt;
* Optimized RAM ECC Scrub Rates&lt;br /&gt;
* Setup Thermal Throttling&lt;br /&gt;
* Enabled Thermal Shutdown&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/2/22/Coreboot-15h_2025.11.09-v4.11-6f1fd5cf220_supermicro_h8scm_seabios_ucode_matrox-oprom_vga-oproms.tar.gz 2MB]&lt;br /&gt;
|-&lt;br /&gt;
|2025.10.31-v4.11-c71dd7896fe&lt;br /&gt;
|&lt;br /&gt;
* Enabled the IOMMU&lt;br /&gt;
* Enabled the HPET&lt;br /&gt;
* Added coreinfo and memtest&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/3/31/Coreboot-15h_2025.10.31-v4.11-c71dd7896fe_supermicro_h8scm_seabios_ucode_matrox-oprom_vga-oproms.tar.gz 2MB]&lt;br /&gt;
|-&lt;br /&gt;
|2025.04.28-v4.11-34811b78c48&lt;br /&gt;
|&lt;br /&gt;
* Fixed support for rev 1.02 motherboards&lt;br /&gt;
* Added support for UDIMM and LRDIMM memory&lt;br /&gt;
* Updated config&lt;br /&gt;
** RAM interleaving is only enabled for channels, not bank nor nodes&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/6/61/Coreboot-15h_2025.04.28-v4.11-34811b78c48_supermicro_h8scm_seabios_ucode_matrox-oprom_vga-oproms.tar.gz 2MB]&lt;br /&gt;
|-&lt;br /&gt;
|2025.03.08-v4.11-9f78cb25cd&lt;br /&gt;
|&lt;br /&gt;
* Updated config&lt;br /&gt;
** Onboard VGA is no longer primary by default&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/3/34/Coreboot-15h_2025.03.08-v4.11-9f78cb25cd_supermicro_h8scm_seabios_ucode_matrox-oprom_vga-oproms.tar.gz 2MB]&lt;br /&gt;
|-&lt;br /&gt;
|2025.02.23-v4.11-583f5e6a34&lt;br /&gt;
|&lt;br /&gt;
* Initial v4.11 AGESA release&lt;br /&gt;
** Microcode Updated&lt;br /&gt;
** Added fan control&lt;br /&gt;
** Various AGESA bugs fixed&lt;br /&gt;
** IOMMU is disabled&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/5/58/Coreboot-15h_2025.02.23-v4.11-583f5e6a34_supermicro_h8scm_seabios_ucode_matrox-oprom_vga-oproms.tar.gz 2MB]&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
=== [[Supermicro H8SGL]] ===&lt;br /&gt;
Supported motherboard variants: &lt;br /&gt;
* &#039;&#039;&#039;H8SGL&#039;&#039;&#039;&lt;br /&gt;
* &#039;&#039;&#039;H8SGL-F&#039;&#039;&#039;&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
| {{center|&#039;&#039;&#039;Release&#039;&#039;&#039;}}&lt;br /&gt;
| {{center|&#039;&#039;&#039;Notes&#039;&#039;&#039;}}&lt;br /&gt;
| {{center|&#039;&#039;&#039;Download Options&#039;&#039;&#039;}}&lt;br /&gt;
|-&lt;br /&gt;
|2026.05.04-v4.11-5d336ff7176&lt;br /&gt;
|&lt;br /&gt;
* Improved power efficiency&lt;br /&gt;
* Improved SATA performance&lt;br /&gt;
* Improved thermal management&lt;br /&gt;
* Enabled PCIe ASPM support&lt;br /&gt;
* Enabled TPM support&lt;br /&gt;
** TPM 1.2 and 2.0 are supported&lt;br /&gt;
** TPM 2.0 is enabled by default&lt;br /&gt;
** TPM measured boot is supported&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/d/d3/Coreboot-15h_2026.05.04-v4.11-5d336ff7176_supermicro_h8sgl_seabios_ucode_matrox-oprom_vga-oproms.tar.gz 2MB]&lt;br /&gt;
|-&lt;br /&gt;
|2025.11.18-v4.11-4094163932a&lt;br /&gt;
|&lt;br /&gt;
* Partial UART support&lt;br /&gt;
** Requires the BMC to be online&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/2/26/Coreboot-15h_2025.11.18-v4.11-4094163932a_supermicro_h8sgl_seabios_ucode_matrox-oprom_vga-oproms.tar.gz 2MB]&lt;br /&gt;
|-&lt;br /&gt;
|2025.11.09-v4.11-6f1fd5cf220&lt;br /&gt;
|&lt;br /&gt;
* Optimized HyperTransport Speed and Deemphasis&lt;br /&gt;
* Optimized RAM Power Saving&lt;br /&gt;
* Optimized RAM ECC Scrub Rates&lt;br /&gt;
* Setup Thermal Throttling&lt;br /&gt;
* Enabled Thermal Shutdown&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/c/cc/Coreboot-15h_2025.11.09-v4.11-6f1fd5cf220_supermicro_h8sgl_seabios_ucode_matrox-oprom_vga-oproms.tar.gz 2MB]&lt;br /&gt;
|-&lt;br /&gt;
|2025.10.31-v4.11-c71dd7896fe&lt;br /&gt;
|&lt;br /&gt;
* Enabled the IOMMU&lt;br /&gt;
* Enabled the HPET&lt;br /&gt;
* Added coreinfo and memtest&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/5/51/Coreboot-15h_2025.10.31-v4.11-c71dd7896fe_supermicro_h8sgl_seabios_ucode_matrox-oprom_vga-oproms.tar.gz 2MB]&lt;br /&gt;
|-&lt;br /&gt;
|2025.09.15-v4.11-58cfb23a680&lt;br /&gt;
|&lt;br /&gt;
* Initial release&lt;br /&gt;
** IOMMU is disabled&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/a/a4/Coreboot-15h_2025.09.15-v4.11-58cfb23a680_supermicro_h8sgl_seabios_ucode_matrox-oprom_vga-oproms.tar.gz 2MB]&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
=== [[Supermicro H8QG6]] ===&lt;br /&gt;
Supported motherboard variants:&lt;br /&gt;
* &#039;&#039;&#039;H8QGi+-F&#039;&#039;&#039;&lt;br /&gt;
* &#039;&#039;&#039;H8QG6+-F&#039;&#039;&#039;&lt;br /&gt;
Unsupported motherboard variants:&lt;br /&gt;
* &#039;&#039;&#039;H8QGi+-LN4F&#039;&#039;&#039; and &#039;&#039;&#039;H8QG7+-LN4F&#039;&#039;&#039;&lt;br /&gt;
** Support can be added if someone has either board&lt;br /&gt;
* &#039;&#039;&#039;H8QGi-F&#039;&#039;&#039;, &#039;&#039;&#039;H8QG6-F&#039;&#039;&#039;, &#039;&#039;&#039;H8QGi-LN4F&#039;&#039;&#039;, and &#039;&#039;&#039;H8QG7-LN4F&#039;&#039;&#039;&lt;br /&gt;
** Dual northbridge support is incomplete&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
| {{center|&#039;&#039;&#039;Release&#039;&#039;&#039;}}&lt;br /&gt;
| {{center|&#039;&#039;&#039;Notes&#039;&#039;&#039;}}&lt;br /&gt;
| {{center|&#039;&#039;&#039;Download Options&#039;&#039;&#039;}}&lt;br /&gt;
|-&lt;br /&gt;
|2026.05.04-v4.11-5d336ff7176&lt;br /&gt;
|&lt;br /&gt;
* Improved power efficiency&lt;br /&gt;
* Improved SATA performance&lt;br /&gt;
* Improved thermal management&lt;br /&gt;
* Enabled PCIe ASPM support&lt;br /&gt;
* Enabled TPM support&lt;br /&gt;
** TPM 1.2 and 2.0 are supported&lt;br /&gt;
** TPM 2.0 is enabled by default&lt;br /&gt;
** TPM measured boot is supported&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/5/5f/Coreboot-15h_2026.05.04-v4.11-5d336ff7176_supermicro_h8qg6_seabios_ucode_matrox-oprom_vga-oproms.tar.gz 2MB]&lt;br /&gt;
|-&lt;br /&gt;
|2026.03.13-v4.11-0b517349413&lt;br /&gt;
|&lt;br /&gt;
* Optimized HyperTransport Speed and Deemphasis&lt;br /&gt;
* Optimized RAM Power Saving&lt;br /&gt;
* Optimized RAM ECC Scrub Rates&lt;br /&gt;
* Setup Thermal Throttling&lt;br /&gt;
* Enabled Thermal Shutdown&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/c/c4/Coreboot-15h_2026.03.13-v4.11-0b517349413_supermicro_h8qg6_seabios_ucode_matrox-oprom_vga-oproms.tar.gz 2MB]&lt;br /&gt;
|-&lt;br /&gt;
|2025.10.31-v4.11-c71dd7896fe&lt;br /&gt;
|&lt;br /&gt;
* Enabled the IOMMU&lt;br /&gt;
* Enabled the HPET&lt;br /&gt;
* Added coreinfo and memtest&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/f/f9/Coreboot-15h_2025.10.31-v4.11-c71dd7896fe_supermicro_h8qg6-pm-f_seabios_ucode_matrox-oprom_vga-oproms.tar.gz 2MB]&lt;br /&gt;
|-&lt;br /&gt;
|2025.04.28-v4.11-34811b78c48&lt;br /&gt;
|&lt;br /&gt;
* Added support for UDIMM and LRDIMM memory&lt;br /&gt;
* Updated config&lt;br /&gt;
** RAM interleaving is only enabled for channels, not bank nor nodes&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/d/dc/Coreboot-15h_2025.04.28-v4.11-34811b78c48_supermicro_h8qg6-pm-f_seabios_ucode_matrox-oprom_vga-oproms.tar.gz 2MB]&lt;br /&gt;
|-&lt;br /&gt;
|2025.03.08-v4.11-9f78cb25cd&lt;br /&gt;
|&lt;br /&gt;
* Updated config&lt;br /&gt;
** Onboard VGA is no longer primary by default&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/6/65/Coreboot-15h_2025.03.08-v4.11-9f78cb25cd_supermicro_h8qg6-pm-f_seabios_ucode_matrox-oprom_vga-oproms.tar.gz 2MB]&lt;br /&gt;
|-&lt;br /&gt;
|2025.02.25-v4.11-97011b87c1&lt;br /&gt;
|&lt;br /&gt;
* Initial v4.11 AGESA release&lt;br /&gt;
** Microcode Updated&lt;br /&gt;
** Added fan control&lt;br /&gt;
** Enabled onboard SAS controller&lt;br /&gt;
** Various AGESA bugs fixed&lt;br /&gt;
** IOMMU is disabled&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/6/64/Coreboot-15h_2025.02.25-v4.11-97011b87c1_supermicro_h8qg6-pm-f_seabios_ucode_matrox-oprom_vga-oproms.tar.gz 2MB]&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
=== [[Lenovo ThinkPad X140e]] ===&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
| {{center|&#039;&#039;&#039;Release&#039;&#039;&#039;}}&lt;br /&gt;
| {{center|&#039;&#039;&#039;Notes&#039;&#039;&#039;}}&lt;br /&gt;
| {{center|&#039;&#039;&#039;Download Options&#039;&#039;&#039;}}&lt;br /&gt;
|-&lt;br /&gt;
|2026.03.29-v4.18-7ebae77863&lt;br /&gt;
|&lt;br /&gt;
* Added support for boards with the A4 CPU&lt;br /&gt;
* Enabled PCIe power saving features&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + APU-OpROM&lt;br /&gt;
** [https://15h.org/images/7/73/Coreboot-15h_2026.03.29-v4.18-7ebae77863_lenovo_x140e_seabios_ucode_apu-oprom.tar.gz 4MB]&lt;br /&gt;
|-&lt;br /&gt;
|2026.03.26-v4.18-ff66166ebf&lt;br /&gt;
|&lt;br /&gt;
* Partial support for Fn hotkeys&lt;br /&gt;
* Added memtest and coreinfo payloads&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + APU-OpROM&lt;br /&gt;
** [https://15h.org/images/0/08/Coreboot-15h_2026.03.26-v4.18-ff66166ebf_lenovo_x140e_seabios_ucode_apu-oprom.tar.gz 4MB]&lt;br /&gt;
|-&lt;br /&gt;
|2026.03.20-v4.18-60f79fa1ed&lt;br /&gt;
|&lt;br /&gt;
* Fixed speakers&lt;br /&gt;
* All USBs are  bootable&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + APU-OpROM&lt;br /&gt;
** [https://15h.org/images/7/77/Coreboot-15h_2026.03.20-v4.18-60f79fa1ed_lenovo_x140e_seabios_ucode_apu-oprom.tar.gz 4MB]&lt;br /&gt;
|-&lt;br /&gt;
|2026.03.15-v4.18-7f0a560c9f&lt;br /&gt;
|&lt;br /&gt;
* Initial release&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + APU-OpROM&lt;br /&gt;
** [https://15h.org/images/b/b0/Coreboot-15h_2026.03.15-v4.18-7f0a560c9f_lenovo_x140e_seabios_ucode_apu-oprom.tar.gz 4MB]&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
==Beta==&lt;br /&gt;
&lt;br /&gt;
=== [[ASUS F2A85-M]] ===&lt;br /&gt;
Supported motherboard variants: &lt;br /&gt;
* &#039;&#039;&#039;F2A85-M&#039;&#039;&#039;&lt;br /&gt;
* &#039;&#039;&#039;F2A85-M PRO&#039;&#039;&#039;&lt;br /&gt;
* &#039;&#039;&#039;F2A85-M LE&#039;&#039;&#039;&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
| {{center|&#039;&#039;&#039;Release&#039;&#039;&#039;}}&lt;br /&gt;
| {{center|&#039;&#039;&#039;Notes&#039;&#039;&#039;}}&lt;br /&gt;
| {{center|&#039;&#039;&#039;Download Options&#039;&#039;&#039;}}&lt;br /&gt;
|-&lt;br /&gt;
|2026.04.06-v4.18-d36fa395e4&lt;br /&gt;
|&lt;br /&gt;
* Setup support for the iGPU and dGPU&lt;br /&gt;
* Fixed an IOAPIC ID calculation&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + APU-OpROM + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/3/3d/Coreboot-15h_2026.04.06-v4.18-d36fa395e4_asus_f2a85m_seabios_ucode_apu-oprom_vga-oproms.tar.gz 8MB F2A85-M]&lt;br /&gt;
** [https://15h.org/images/f/fc/Coreboot-15h_2026.04.06-v4.18-d36fa395e4_asus_f2a85m-pro_seabios_ucode_apu-oprom_vga-oproms.tar.gz 8MB F2A85-M PRO]&lt;br /&gt;
** [https://15h.org/images/e/e6/Coreboot-15h_2026.04.06-v4.18-d36fa395e4_asus_f2a85m-le_seabios_ucode_apu-oprom_vga-oproms.tar.gz 8MB F2A85-M LE]&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
=== [[ASUS Sabertooth 990FX R2.0]] ===&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
| {{center|&#039;&#039;&#039;Release&#039;&#039;&#039;}}&lt;br /&gt;
| {{center|&#039;&#039;&#039;Notes&#039;&#039;&#039;}}&lt;br /&gt;
| {{center|&#039;&#039;&#039;Download Options&#039;&#039;&#039;}}&lt;br /&gt;
|-&lt;br /&gt;
|2026.05.11-v4.11-0fe4a6552b8&lt;br /&gt;
|&lt;br /&gt;
* Initial v4.11 AGESA release&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/6/62/Coreboot-15h_2026.05.11-v4.11-0fe4a6552b8_asus_sabertooth-990fx-r2_seabios_ucode_vga-oproms_8mb.tar.gz 8MB]&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Third-Party Support ==&lt;br /&gt;
These boards can be built using coreboot-15h, but are currently best-supported by Mike Banon&#039;s &amp;lt;code&amp;gt;restore_agesa.sh&amp;lt;/code&amp;gt; script.&lt;br /&gt;
&lt;br /&gt;
=== Lenovo G505s ===&lt;br /&gt;
See [https://dangerousprototypes.com/docs/Lenovo_G505S_hacking#restore_agesa.sh here]&lt;br /&gt;
&lt;br /&gt;
=== ASUS A88XM-E ===&lt;br /&gt;
See [https://dangerousprototypes.com/docs/Lenovo_G505S_hacking#restore_agesa.sh here]&lt;br /&gt;
&lt;br /&gt;
=== ASUS AM1I-A ===&lt;br /&gt;
See [https://dangerousprototypes.com/docs/Lenovo_G505S_hacking#restore_agesa.sh here]&lt;br /&gt;
&lt;br /&gt;
== Deprecated ==&lt;br /&gt;
&lt;br /&gt;
=== [[KGPE-D16 (Raptor)|ASUS KGPE-D16 (Raptor)]] ===&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
| {{center|&#039;&#039;&#039;Release&#039;&#039;&#039;}}&lt;br /&gt;
| {{center|&#039;&#039;&#039;Notes&#039;&#039;&#039;}}&lt;br /&gt;
| {{center|&#039;&#039;&#039;Download Options&#039;&#039;&#039;}}&lt;br /&gt;
|-&lt;br /&gt;
|2025.03.08-v4.11-9f78cb25cd&lt;br /&gt;
|&lt;br /&gt;
* Updated configs&lt;br /&gt;
** Sets default CMOS settings each boot&lt;br /&gt;
** Expanded CBFS for 16MB&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/b/b7/Coreboot-15h_2025.03.08-v4.11-9f78cb25cd_asus_kgpe-d16_seabios_ucode_ast2050-oprom_vga-oproms_16mb.tar.gz 16MB]&lt;br /&gt;
* SeaBIOS + uCode&lt;br /&gt;
** [https://15h.org/images/a/aa/Coreboot-15h_2025.03.08-v4.11-9f78cb25cd_asus_kgpe-d16_seabios_ucode_no-oproms_16mb.tar.gz 16MB]&lt;br /&gt;
* SeaBIOS (blob-free)&lt;br /&gt;
** [https://15h.org/images/7/72/Coreboot-15h_2025.03.08-v4.11-9f78cb25cd_asus_kgpe-d16_seabios_no-ucode_no-oproms_16mb.tar.gz 16MB]&lt;br /&gt;
|-&lt;br /&gt;
|2025.02.23-v4.11-583f5e6a34&lt;br /&gt;
|&lt;br /&gt;
* Added fan control&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/5/59/Coreboot-15h_2025.02.23-v4.11-583f5e6a34_asus_kgpe-d16_seabios_ucode_ast2050-oprom_vga-oproms_2mb.tar.gz 2MB] [https://15h.org/images/a/af/Coreboot-15h_2025.02.23-v4.11-583f5e6a34_asus_kgpe-d16_seabios_ucode_ast2050-oprom_vga-oproms_16mb.tar.gz 16MB]&lt;br /&gt;
* SeaBIOS + uCode&lt;br /&gt;
** [https://15h.org/images/d/de/Coreboot-15h_2025.02.23-v4.11-583f5e6a34_asus_kgpe-d16_seabios_ucode_no-oproms_2mb.tar.gz 2MB] [https://15h.org/images/a/af/Coreboot-15h_2025.02.23-v4.11-583f5e6a34_asus_kgpe-d16_seabios_ucode_no-oproms_16mb.tar.gz 16MB]&lt;br /&gt;
* SeaBIOS (blob-free)&lt;br /&gt;
** [https://15h.org/images/d/dc/Coreboot-15h_2025.02.23-v4.11-583f5e6a34_asus_kgpe-d16_seabios_no-ucode_no-oproms_2mb.tar.gz 2MB] [https://15h.org/images/4/4f/Coreboot-15h_2025.02.23-v4.11-583f5e6a34_asus_kgpe-d16_seabios_no-ucode_no-oproms_16mb.tar.gz 16MB]&lt;br /&gt;
|-&lt;br /&gt;
|2024.09.16-v4.11-d176edf4ae&lt;br /&gt;
|&lt;br /&gt;
* Added more configuration variants&lt;br /&gt;
* Removed coreinfo as a secondary payload&lt;br /&gt;
* coreboot codebase unchanged&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/3/35/Coreboot-15h_2024.09.16-v4.11-d176edf4ae_asus_kgpe-d16_seabios_ucode_ast2050-oprom_vga-oproms_2mb.tar.gz 2MB] [https://15h.org/images/3/32/Coreboot-15h_2024.09.16-v4.11-d176edf4ae_asus_kgpe-d16_seabios_ucode_ast2050-oprom_vga-oproms_16mb.tar.gz 16MB]&lt;br /&gt;
* SeaBIOS + uCode&lt;br /&gt;
** [https://15h.org/images/0/01/Coreboot-15h_2024.09.16-v4.11-d176edf4ae_asus_kgpe-d16_seabios_ucode_no-oproms_2mb.tar.gz 2MB] [https://15h.org/images/e/e6/Coreboot-15h_2024.09.16-v4.11-d176edf4ae_asus_kgpe-d16_seabios_ucode_no-oproms_16mb.tar.gz 16MB]&lt;br /&gt;
* SeaBIOS (blob-free)&lt;br /&gt;
** [https://15h.org/images/5/5d/Coreboot-15h_2024.09.16-v4.11-d176edf4ae_asus_kgpe-d16_seabios_no-ucode_no-oproms_2mb.tar.gz 2MB] [https://15h.org/images/5/5a/Coreboot-15h_2024.09.16-v4.11-d176edf4ae_asus_kgpe-d16_seabios_no-ucode_no-oproms_16mb.tar.gz 16MB]&lt;br /&gt;
|-&lt;br /&gt;
|&lt;br /&gt;
2024.09.14-v4.11-065549759c&lt;br /&gt;
|&lt;br /&gt;
* Improved board stability&lt;br /&gt;
** Fixed bugs in RAM initialization code&lt;br /&gt;
** Fixed HyperTransport Deemphasis values&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/1/18/Coreboot-15h_2024.09.14-v4.11-065549759c_asus_kgpe-d16_seabios_ucode_ast2050-oprom_vga-oproms_2mb.tar.gz 2MB] [https://15h.org/images/d/d4/Coreboot-15h_2024.09.14-v4.11-065549759c_asus_kgpe-d16_seabios_ucode_ast2050-oprom_vga-oproms_16mb.tar.gz 16MB]&lt;br /&gt;
|}&lt;/div&gt;</summary>
		<author><name>Mrothfuss</name></author>
	</entry>
	<entry>
		<id>https://15h.org/index.php?title=File:Coreboot-15h_2026.05.27-v4.11-57e26bdcd95_asus_crosshair-v-formula-z_seabios_ucode_vga-oproms_8mb.tar.gz&amp;diff=2917</id>
		<title>File:Coreboot-15h 2026.05.27-v4.11-57e26bdcd95 asus crosshair-v-formula-z seabios ucode vga-oproms 8mb.tar.gz</title>
		<link rel="alternate" type="text/html" href="https://15h.org/index.php?title=File:Coreboot-15h_2026.05.27-v4.11-57e26bdcd95_asus_crosshair-v-formula-z_seabios_ucode_vga-oproms_8mb.tar.gz&amp;diff=2917"/>
		<updated>2026-06-22T02:08:58Z</updated>

		<summary type="html">&lt;p&gt;Mrothfuss: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;&lt;/div&gt;</summary>
		<author><name>Mrothfuss</name></author>
	</entry>
	<entry>
		<id>https://15h.org/index.php?title=Coreboot-15h&amp;diff=2912</id>
		<title>Coreboot-15h</title>
		<link rel="alternate" type="text/html" href="https://15h.org/index.php?title=Coreboot-15h&amp;diff=2912"/>
		<updated>2026-05-31T21:15:52Z</updated>

		<summary type="html">&lt;p&gt;Mrothfuss: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{{lowercase title}}&lt;br /&gt;
&lt;br /&gt;
&#039;&#039;&#039;coreboot-15h&#039;&#039;&#039;, also known as &#039;&#039;&#039;Mike&#039;s coreboot&#039;&#039;&#039;, is a distribution of [[coreboot]] for various [[Family 15h]] motherboards, developed by [[User:Mrothfuss|mrothfuss]], using AMD&#039;s open-source fam15h AGESA and CIMX for initialization. This has allowed for the reintroduction of several boards long-deprecated upstream (such as the [[H8QGi+-F]]), and has allowed several previously-unsupported Family 15h boards (particularly others from [[Supermicro]]) to be ported. On [[ASUS]] boards that were once supported by [[Raptor Engineering]]&#039;s native initialization implementation (removed upstream in coreboot 4.12), coreboot-15h offers improved reliability and hardware compatibility over upstream coreboot 4.11 and [[Dasharo]] 0.4.0. Improvements include dramatically more reliable memory initialization (including support for more memory and denser modules), improved stability once booted, significantly improved HyperTransport configuration, native support for hardware monitoring and fan control, and patches to the build system to allow building on modern platforms. It is, at the time of writing, believed to be the most stable and complete coreboot variant available for the hardware it targets, and it currently appears to be the only actively-developed coreboot variant supporting family 15h.&lt;br /&gt;
&lt;br /&gt;
== History ==&lt;br /&gt;
&lt;br /&gt;
Attempts were made in 2022 to complete the [[Raptor Engineering]] port of coreboot for the [[KGPE-D16|ASUS KGPE-D16]] motherboard. This involved an effort by [[User:Mrothfuss|mrothfuss]] to fix bugs in the previous 4.11 codebase&amp;lt;ref&amp;gt;https://github.com/mrothfuss/coreboot-D16 coreboot-D16&amp;lt;/ref&amp;gt; and development by [[Dasharo]] to migrate the platform to coreboot 4.15&amp;lt;ref&amp;gt;https://docs.dasharo.com/variants/asus_kgpe_d16/overview/&amp;lt;/ref&amp;gt;. Improvements made by [[User:Mrothfuss|mrothfuss]] were upstreamed to [[Dasharo]]&#039;s fork&amp;lt;ref&amp;gt;https://github.com/Dasharo/coreboot/pull/116&amp;lt;/ref&amp;gt;. Both efforts ultimately failed to produce reliable firmware for the [[KGPE-D16|ASUS KGPE-D16]] motherboard.&lt;br /&gt;
&lt;br /&gt;
Initial testing and development of AMD&#039;s open source AGESA/CIMx codebases by [[User:Mrothfuss|mrothfuss]] began in 2023 as a fork of coreboot 4.0 called [https://github.com/mrothfuss/coreboot-agesa coreboot-agesa]. Support for AMD Fam15 on the existing [[Supermicro]] [[H8SCM]] and [[H8QGi%2B-F]] motherboards was confirmed and improved. A new port for the [[H8DGi]] was successfully made using this codebase, providing a reliable and performant dual socket G34 motherboard similar to the [[KGPE-D16|ASUS KGPE-D16]]. Compilation of this old source code, however, required an inconvenient Debian 6 environment.&lt;br /&gt;
&lt;br /&gt;
In early 2025, the AGESA/CIMx codebases were successfully reintegrated into coreboot 4.11 under the [[coreboot-15h]] project. Initially the previous [[Supermicro]] motherboards ([[H8QGi%2B-F]], [[H8DGi]], [[H8SCM]]) were supported. New AGESA/CIMx ports for the [[ASUS]] motherboards, [[KGPE-D16]] and [[KCMA-D8]], were developed and tested by [[User:Mrothfuss|mrothfuss]] and [[User:Rane|rane]]. Integration of the AGESA/CIMx codebase into coreboot was subsequently improved, namely adding IOMMU support for AMD Fam15 motherboards. At this point, [[coreboot-15h]] surpassed all other firmware options for the supported motherboards; providing more features, better multicore performance, better power efficiency, and speculative-execution mitigation support.&lt;br /&gt;
&lt;br /&gt;
== Branches ==&lt;br /&gt;
[[coreboot-15h]] has two main branches, 4.11_branch and 4.18_branch. The two branches support different AMD architectures.&lt;br /&gt;
&lt;br /&gt;
&#039;&#039;&#039;4.11_branch&#039;&#039;&#039;&lt;br /&gt;
* Bulldozer and Piledriver&lt;br /&gt;
&#039;&#039;&#039;4.18_branch&#039;&#039;&#039;&lt;br /&gt;
* Trinity and Richland&lt;br /&gt;
* Jaguar&lt;br /&gt;
&lt;br /&gt;
Development of the two branches is organized into three main categories.&lt;br /&gt;
&lt;br /&gt;
&#039;&#039;&#039;release candidate (rc):&#039;&#039;&#039; The final round of testing on hardware occurs on this branch before merging into the main branches.&lt;br /&gt;
* 4.11_branch-rc&lt;br /&gt;
* 4.18_branch-rc&lt;br /&gt;
&lt;br /&gt;
&#039;&#039;&#039;staging:&#039;&#039;&#039; Where completed features/changes accumulate before more rigorous validation. Code in the staging branches should be stable and reliable.&lt;br /&gt;
* 4.11_staging&lt;br /&gt;
* 4.18_staging&lt;br /&gt;
&lt;br /&gt;
&#039;&#039;&#039;work in progress (wip):&#039;&#039;&#039; Feature branches (ie: 4.11_wip-atombios-runner) where volatile/experimental changes are made. These are typically squashed into staging as a single commit once complete.&lt;br /&gt;
&lt;br /&gt;
== Compiling coreboot from source ==&lt;br /&gt;
Compilation has been tested on Debian 12 and FreeBSD 14.2. Building on FreeBSD is the same as building on Linux, but &#039;make&#039; is replaced with &#039;gmake&#039;.&lt;br /&gt;
&lt;br /&gt;
&#039;&#039;&#039;Tested GCC Versions&#039;&#039;&#039;&lt;br /&gt;
* GCC12 Works&lt;br /&gt;
* GCC14 Fails, run-time errors.&lt;br /&gt;
* GCC15 Fails, compile-time errors.&lt;br /&gt;
&lt;br /&gt;
&#039;&#039;&#039;Debian 12 Dependencies&#039;&#039;&#039;&lt;br /&gt;
&lt;br /&gt;
 &lt;br /&gt;
 apt install git build-essential m4 bison flex zlib1g-dev libncurses-dev imagemagick python-is-python3 gnat libssl-dev pkg-config curl&lt;br /&gt;
  &lt;br /&gt;
&lt;br /&gt;
&#039;&#039;&#039;FreeBSD 14.2 Dependencies&#039;&#039;&#039;&lt;br /&gt;
&lt;br /&gt;
 &amp;lt;nowiki&amp;gt;&lt;br /&gt;
### This list may be incomplete&lt;br /&gt;
pkg install git bash gmake gcc12 m4 bison ImageMagick7  python autoconf automake gettext-tools gnu-unifont&lt;br /&gt;
 &amp;lt;/nowiki&amp;gt;&lt;br /&gt;
&lt;br /&gt;
&#039;&#039;&#039;Configuring and Compiling&#039;&#039;&#039;&lt;br /&gt;
&lt;br /&gt;
 &amp;lt;nowiki&amp;gt;&lt;br /&gt;
### Fetch coreboot-15h source&lt;br /&gt;
# Tip: Add the &#039;--depth=1&#039; argument to save bandwidth. You&lt;br /&gt;
#      will not be able to checkout previous commits if you&lt;br /&gt;
#      use this shallow clone option.&lt;br /&gt;
git clone https://git.15h.org/mrothfuss/coreboot-15h.git&lt;br /&gt;
cd coreboot-15h&lt;br /&gt;
&lt;br /&gt;
### Optional: Checkout a specific commit to reproduce a release&lt;br /&gt;
# git commit-id&#039;s are included at the end of a release name&lt;br /&gt;
# Example: 2025.11.09-v4.11-6f1fd5cf220&lt;br /&gt;
git checkout 6f1fd5cf220&lt;br /&gt;
&lt;br /&gt;
### Optional: Fetch blobs (required for VGABIOS ROMs)&lt;br /&gt;
# Blobs can be explicitly excluded from the build by menuconfig&lt;br /&gt;
# Tip: Add the &#039;--depth=1&#039; argument to save bandwidth&lt;br /&gt;
git submodule update --init --checkout 3rdparty/blobs&lt;br /&gt;
&lt;br /&gt;
### Optional: Manually fetch the vboot submodule&lt;br /&gt;
# This submodule will be fetched automatically, but needs to be&lt;br /&gt;
# manually downloaded if you want to use the &#039;UPDATED_SUBMODULES=1&#039;&lt;br /&gt;
# option during the coreboot.rom compilation (see below).&lt;br /&gt;
# Tip: Add the &#039;--depth=1&#039; argument to save bandwidth&lt;br /&gt;
git submodule update --init --checkout 3rdparty/vboot&lt;br /&gt;
&lt;br /&gt;
### Build the cross compiler (may take a while)&lt;br /&gt;
make crossgcc-i386 CPUS=$(nproc)&lt;br /&gt;
&lt;br /&gt;
### Select a config template from ./configs&lt;br /&gt;
# These config files are used to compile the releases distributed on 15h.org&lt;br /&gt;
# Copy the config you want to start with, you can adjust it in the next step&lt;br /&gt;
cp configs/config.asus_kgpe-d16_seabios_ucode_ast2050-oprom_vga-oproms_2mb .config&lt;br /&gt;
&lt;br /&gt;
### Optional: Review or adjust your configuration&lt;br /&gt;
make menuconfig&lt;br /&gt;
&lt;br /&gt;
### Build coreboot, your ROM will be at ./build/coreboot.rom&lt;br /&gt;
# Tip: Add the &#039;UPDATED_SUBMODULES=1&#039; argument to skip fetching/updating all submodules&lt;br /&gt;
make&lt;br /&gt;
&amp;lt;/nowiki&amp;gt;&lt;br /&gt;
&lt;br /&gt;
&#039;&#039;&#039;Listing Source Files&#039;&#039;&#039;&lt;br /&gt;
&lt;br /&gt;
To review a precise list of files compiled into your ./build/coreboot.rom file, use this command.&lt;br /&gt;
 &amp;lt;nowiki&amp;gt;&lt;br /&gt;
make filelist&amp;lt;/nowiki&amp;gt;&lt;br /&gt;
&lt;br /&gt;
This command works after a successful &#039;make&#039; and changes depending on the motherboard and configuration options selected.&lt;br /&gt;
&lt;br /&gt;
&#039;&#039;&#039;Fetching Updates&#039;&#039;&#039;&lt;br /&gt;
&lt;br /&gt;
 &amp;lt;nowiki&amp;gt;&lt;br /&gt;
git pull&amp;lt;/nowiki&amp;gt;&lt;br /&gt;
&lt;br /&gt;
&#039;&#039;&#039;Switching Motherboards&#039;&#039;&#039;&lt;br /&gt;
&lt;br /&gt;
If you want to switch motherboards, you must first clean the build environment. Afterwards, continue from the config selection step.&lt;br /&gt;
 &amp;lt;nowiki&amp;gt;&lt;br /&gt;
make distclean&amp;lt;/nowiki&amp;gt;&lt;br /&gt;
&lt;br /&gt;
== License ==&lt;br /&gt;
&lt;br /&gt;
Because of the way coreboot began, using a significant amount of source code from the Linux kernel, it&#039;s licensed the same way as the Linux Kernel, with GNU General Public License (GPL) Version 2. Individual files are licensed under various licenses, though all are compatible with GPLv2. Exceptions are listed below.&lt;br /&gt;
&lt;br /&gt;
Files under coreboot/Documentation/ are licensed under CC-BY 4.0 terms. As an exception, files under Documentation/ with a history older than 2017-05-24 might be under different licenses.&lt;br /&gt;
&lt;br /&gt;
Files in the coreboot/src/commonlib/bsd directory are all licensed with the BSD-3-clause license. Many are also dual-licensed GPL-2.0-only or GPL-2.0-or-later. These files are intended to be shared with libpayload or other BSD licensed projects.&lt;br /&gt;
&lt;br /&gt;
Source code in the coreboot/src/vendorcode/amd directory is licensed with the BSD-3-clause license. Certain microcode updates ship with a more restricted license described within each microcode patch file.&lt;br /&gt;
&lt;br /&gt;
The libpayload project contained in coreboot/payloads/libpayload may be licensed as BSD or GPL, depending on the code pulled in during the build process. All GPL source code should be excluded unless the Kconfig option to include it is set.&lt;br /&gt;
&lt;br /&gt;
Firmware images released by the coreboot-15h project are shipped with the necessary licenses within the associated tarball.&lt;br /&gt;
&lt;br /&gt;
==Stable==&lt;br /&gt;
&lt;br /&gt;
=== [[ASUS KCMA-D8]] ===&lt;br /&gt;
Supported motherboard variants: &lt;br /&gt;
* &#039;&#039;&#039;KCMA-D8&#039;&#039;&#039; (Serial Numbers B9S2xxxxxxxx and up)&lt;br /&gt;
Unsupported motherboard variants:&lt;br /&gt;
* &#039;&#039;&#039;KCMA-D8&#039;&#039;&#039; (Serial Numbers B8S2xxxxxxxx and below)&lt;br /&gt;
** These old boards only work with 4100 series Opterons&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
| {{center|&#039;&#039;&#039;Release&#039;&#039;&#039;}}&lt;br /&gt;
| {{center|&#039;&#039;&#039;Notes&#039;&#039;&#039;}}&lt;br /&gt;
| {{center|&#039;&#039;&#039;Download Options&#039;&#039;&#039;}}&lt;br /&gt;
|-&lt;br /&gt;
|2026.05.04-v4.11-5d336ff7176&lt;br /&gt;
|&lt;br /&gt;
* Improved power efficiency&lt;br /&gt;
* Improved SATA performance&lt;br /&gt;
* Improved thermal management&lt;br /&gt;
* Enabled PCIe ASPM support&lt;br /&gt;
* Enabled the Power LED&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/c/c0/Coreboot-15h_2026.05.04-v4.11-5d336ff7176_asus_kcma-d8_seabios_ucode_ast2050-oprom_vga-oproms_2mb.tar.gz 2MB]&lt;br /&gt;
* SeaBIOS + uCode (text-mode)&lt;br /&gt;
** [https://15h.org/images/7/71/Coreboot-15h_2026.05.04-v4.11-5d336ff7176_asus_kcma-d8_seabios_ucode_no-oproms_2mb.tar.gz 2MB]&lt;br /&gt;
* SeaBIOS (text-mode, blob-free)&lt;br /&gt;
** [https://15h.org/images/e/ed/Coreboot-15h_2026.05.04-v4.11-5d336ff7176_asus_kcma-d8_seabios_no-ucode_no-oproms_2mb.tar.gz 2MB]&lt;br /&gt;
|-&lt;br /&gt;
|2025.12.17-v4.11-582d6f37158&lt;br /&gt;
|&lt;br /&gt;
* Fixed support for the BMC module&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/6/68/Coreboot-15h_2025.12.17-v4.11-582d6f37158_asus_kcma-d8_seabios_ucode_ast2050-oprom_vga-oproms_2mb.tar.gz 2MB]&lt;br /&gt;
* SeaBIOS + uCode (text-mode)&lt;br /&gt;
** [https://15h.org/images/a/a5/Coreboot-15h_2025.12.17-v4.11-582d6f37158_asus_kcma-d8_seabios_ucode_no-oproms_2mb.tar.gz 2MB]&lt;br /&gt;
* SeaBIOS (text-mode, blob-free)&lt;br /&gt;
** [https://15h.org/images/7/70/Coreboot-15h_2025.12.17-v4.11-582d6f37158_asus_kcma-d8_seabios_no-ucode_no-oproms_2mb.tar.gz 2MB]&lt;br /&gt;
|-&lt;br /&gt;
|2025.12.08-v4.11-4bb1cd46931&lt;br /&gt;
|&lt;br /&gt;
* Enabled COM2&lt;br /&gt;
* Fixed COM1/COM2 ACPI Entries&lt;br /&gt;
** Improves OS detection of COM1/COM2 ports&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/e/e9/Coreboot-15h_2025.12.08-v4.11-4bb1cd46931_asus_kcma-d8_seabios_ucode_ast2050-oprom_vga-oproms_2mb.tar.gz 2MB]&lt;br /&gt;
* SeaBIOS + uCode (text-mode)&lt;br /&gt;
** [https://15h.org/images/d/db/Coreboot-15h_2025.12.08-v4.11-4bb1cd46931_asus_kcma-d8_seabios_ucode_no-oproms_2mb.tar.gz 2MB]&lt;br /&gt;
* SeaBIOS (text-mode, blob-free)&lt;br /&gt;
** [https://15h.org/images/a/a8/Coreboot-15h_2025.12.08-v4.11-4bb1cd46931_asus_kcma-d8_seabios_no-ucode_no-oproms_2mb.tar.gz 2MB]&lt;br /&gt;
|-&lt;br /&gt;
|2025.11.11-v4.11-61cbef5bdd2&lt;br /&gt;
|&lt;br /&gt;
* Initial v4.11 AGESA release&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/4/4f/Coreboot-15h_2025.11.11-v4.11-61cbef5bdd2_asus_kcma-d8_seabios_ucode_ast2050-oprom_vga-oproms_2mb.tar.gz 2MB]&lt;br /&gt;
* SeaBIOS + uCode (text-mode)&lt;br /&gt;
** [https://15h.org/images/f/f5/Coreboot-15h_2025.11.11-v4.11-61cbef5bdd2_asus_kcma-d8_seabios_ucode_no-oproms_2mb.tar.gz 2MB]&lt;br /&gt;
* SeaBIOS (text-mode, blob-free)&lt;br /&gt;
** [https://15h.org/images/4/48/Coreboot-15h_2025.11.11-v4.11-61cbef5bdd2_asus_kcma-d8_seabios_no-ucode_no-oproms_2mb.tar.gz 2MB]&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
=== [[ASUS KGPE-D16]] ===&lt;br /&gt;
Supported motherboard variants: &lt;br /&gt;
* &#039;&#039;&#039;KGPE-D16&#039;&#039;&#039;&lt;br /&gt;
* &#039;&#039;&#039;KGPE-D16/CHN&#039;&#039;&#039;&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
| {{center|&#039;&#039;&#039;Release&#039;&#039;&#039;}}&lt;br /&gt;
| {{center|&#039;&#039;&#039;Notes&#039;&#039;&#039;}}&lt;br /&gt;
| {{center|&#039;&#039;&#039;Download Options&#039;&#039;&#039;}}&lt;br /&gt;
|-&lt;br /&gt;
|2026.05.04-v4.11-5d336ff7176&lt;br /&gt;
|&lt;br /&gt;
* Improved power efficiency&lt;br /&gt;
* Improved SATA performance&lt;br /&gt;
* Improved thermal management&lt;br /&gt;
* Enabled PCIe ASPM support&lt;br /&gt;
* Enabled the Power LED&lt;br /&gt;
* Enabled TPM support&lt;br /&gt;
** TPM 1.2 and 2.0 are supported&lt;br /&gt;
** TPM 2.0 is enabled by default&lt;br /&gt;
** TPM measured boot is supported&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/3/34/Coreboot-15h_2026.05.04-v4.11-5d336ff7176_asus_kgpe-d16_seabios_ucode_ast2050-oprom_vga-oproms_2mb.tar.gz 2MB]&lt;br /&gt;
* SeaBIOS + uCode (text-mode)&lt;br /&gt;
** [https://15h.org/images/7/72/Coreboot-15h_2026.05.04-v4.11-5d336ff7176_asus_kgpe-d16_seabios_ucode_no-oproms_2mb.tar.gz 2MB]&lt;br /&gt;
* SeaBIOS (text-mode, blob-free)&lt;br /&gt;
** [https://15h.org/images/9/9b/Coreboot-15h_2026.05.04-v4.11-5d336ff7176_asus_kgpe-d16_seabios_no-ucode_no-oproms_2mb.tar.gz 2MB]&lt;br /&gt;
|-&lt;br /&gt;
|2025.12.17-v4.11-582d6f37158&lt;br /&gt;
|&lt;br /&gt;
* Fixed support for the BMC module&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/7/7b/Coreboot-15h_2025.12.17-v4.11-582d6f37158_asus_kgpe-d16_seabios_ucode_ast2050-oprom_vga-oproms_2mb.tar.gz 2MB]&lt;br /&gt;
* SeaBIOS + uCode (text-mode)&lt;br /&gt;
** [https://15h.org/images/4/4e/Coreboot-15h_2025.12.17-v4.11-582d6f37158_asus_kgpe-d16_seabios_ucode_no-oproms_2mb.tar.gz 2MB]&lt;br /&gt;
* SeaBIOS (text-mode, blob-free)&lt;br /&gt;
** [https://15h.org/images/d/d9/Coreboot-15h_2025.12.17-v4.11-582d6f37158_asus_kgpe-d16_seabios_no-ucode_no-oproms_2mb.tar.gz 2MB]&lt;br /&gt;
|-&lt;br /&gt;
|2025.12.08-v4.11-4bb1cd46931&lt;br /&gt;
|&lt;br /&gt;
* Added x16 support for PCIe Slot 4&lt;br /&gt;
** PCIe 4 Switches to x16 mode if PCIe 5 is empty&lt;br /&gt;
* Enabled COM2&lt;br /&gt;
* Fixed COM1/COM2 ACPI Entries&lt;br /&gt;
** Improves OS detection of COM1/COM2 ports&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/6/65/Coreboot-15h_2025.12.08-v4.11-4bb1cd46931_asus_kgpe-d16_seabios_ucode_ast2050-oprom_vga-oproms_2mb.tar.gz 2MB]&lt;br /&gt;
* SeaBIOS + uCode (text-mode)&lt;br /&gt;
** [https://15h.org/images/5/54/Coreboot-15h_2025.12.08-v4.11-4bb1cd46931_asus_kgpe-d16_seabios_ucode_no-oproms_2mb.tar.gz 2MB]&lt;br /&gt;
* SeaBIOS (text-mode, blob-free)&lt;br /&gt;
** [https://15h.org/images/0/0c/Coreboot-15h_2025.12.08-v4.11-4bb1cd46931_asus_kgpe-d16_seabios_no-ucode_no-oproms_2mb.tar.gz 2MB]&lt;br /&gt;
|-&lt;br /&gt;
|2025.11.09-v4.11-6f1fd5cf220&lt;br /&gt;
|&lt;br /&gt;
* Optimized HyperTransport Speed and Deemphasis&lt;br /&gt;
* Optimized RAM Power Saving&lt;br /&gt;
* Optimized RAM ECC Scrub Rates&lt;br /&gt;
* Setup Thermal Throttling&lt;br /&gt;
* Enabled Thermal Shutdown&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/9/9c/Coreboot-15h_2025.11.09-v4.11-6f1fd5cf220_asus_kgpe-d16_seabios_ucode_ast2050-oprom_vga-oproms_2mb.tar.gz 2MB]&lt;br /&gt;
* SeaBIOS + uCode (text-mode)&lt;br /&gt;
** [https://15h.org/images/8/86/Coreboot-15h_2025.11.09-v4.11-6f1fd5cf220_asus_kgpe-d16_seabios_ucode_no-oproms_2mb.tar.gz 2MB]&lt;br /&gt;
* SeaBIOS (text-mode, blob-free)&lt;br /&gt;
** [https://15h.org/images/4/4c/Coreboot-15h_2025.11.09-v4.11-6f1fd5cf220_asus_kgpe-d16_seabios_no-ucode_no-oproms_2mb.tar.gz 2MB]&lt;br /&gt;
|-&lt;br /&gt;
|2025.10.31-v4.11-c71dd7896fe&lt;br /&gt;
|&lt;br /&gt;
* Enabled the IOMMU&lt;br /&gt;
* Enabled the HPET&lt;br /&gt;
* Added coreinfo and memtest&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/0/0b/Coreboot-15h_2025.10.31-v4.11-c71dd7896fe_asus_kgpe-d16_seabios_ucode_ast2050-oprom_vga-oproms_2mb.tar.gz 2MB]&lt;br /&gt;
* SeaBIOS + uCode (text-mode)&lt;br /&gt;
** [https://15h.org/images/f/f9/Coreboot-15h_2025.10.31-v4.11-c71dd7896fe_asus_kgpe-d16_seabios_ucode_no-oproms_2mb.tar.gz 2MB]&lt;br /&gt;
* SeaBIOS (text-mode, blob-free)&lt;br /&gt;
** [https://15h.org/images/2/22/Coreboot-15h_2025.10.31-v4.11-c71dd7896fe_asus_kgpe-d16_seabios_no-ucode_no-oproms_2mb.tar.gz 2MB]&lt;br /&gt;
|-&lt;br /&gt;
|2025.10.11-v4.11-63a34806baf &lt;br /&gt;
|&lt;br /&gt;
* Added support for microcode removal&lt;br /&gt;
* Created configs with blobs removed&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/1/16/Coreboot-15h_2025.10.11-v4.11-63a34806baf_asus_kgpe-d16_seabios_ucode_ast2050-oprom_vga-oproms_2mb.tar.gz 2MB]&lt;br /&gt;
* SeaBIOS + uCode (text-mode)&lt;br /&gt;
** [https://15h.org/images/2/27/Coreboot-15h_2025.10.11-v4.11-63a34806baf_asus_kgpe-d16_seabios_ucode_no-oproms_2mb.tar.gz 2MB]&lt;br /&gt;
* SeaBIOS (text-mode, blob-free)&lt;br /&gt;
** [https://15h.org/images/8/89/Coreboot-15h_2025.10.11-v4.11-63a34806baf_asus_kgpe-d16_seabios_no-ucode_no-oproms_2mb.tar.gz 2MB]&lt;br /&gt;
|-&lt;br /&gt;
|2025.10.10-v4.11-a99acc20d4a&lt;br /&gt;
|&lt;br /&gt;
* Initial v4.11 AGESA release&lt;br /&gt;
** Robust support for all DIMM slots&lt;br /&gt;
*** up to 32GB RDIMMs supported&lt;br /&gt;
*** up to 64GB LRDIMMs supported&lt;br /&gt;
** Up to 4 PCIe cards supported&lt;br /&gt;
** Native fan control&lt;br /&gt;
** Latest microcode&lt;br /&gt;
** IOMMU is disabled&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/6/6c/Coreboot-15h_2025.10.10-v4.11-a99acc20d4a_asus_kgpe-d16_seabios_ucode_ast2050-oprom_vga-oproms_2mb.tar.gz 2MB]&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
=== [[Supermicro H8SML]] ===&lt;br /&gt;
Supported motherboard variants:&lt;br /&gt;
* &#039;&#039;&#039;H8SML-i&#039;&#039;&#039;&lt;br /&gt;
* &#039;&#039;&#039;H8SML-iF&#039;&#039;&#039;&lt;br /&gt;
* &#039;&#039;&#039;H8SML-7&#039;&#039;&#039;&lt;br /&gt;
* &#039;&#039;&#039;H8SML-7F&#039;&#039;&#039;&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
| {{center|&#039;&#039;&#039;Release&#039;&#039;&#039;}}&lt;br /&gt;
| {{center|&#039;&#039;&#039;Notes&#039;&#039;&#039;}}&lt;br /&gt;
| {{center|&#039;&#039;&#039;Download Options&#039;&#039;&#039;}}&lt;br /&gt;
|-&lt;br /&gt;
|2026.05.04-v4.11-5d336ff7176&lt;br /&gt;
|&lt;br /&gt;
* Initial v4.11 AGESA release&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/5/53/Coreboot-15h_2026.05.04-v4.11-5d336ff7176_supermicro_h8sml_seabios_ucode_matrox-oprom_vga-oproms.tar.gz 2MB]&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
=== [[Supermicro H8SCM]] ===&lt;br /&gt;
Supported motherboard variants:&lt;br /&gt;
* &#039;&#039;&#039;H8SCM&#039;&#039;&#039;&lt;br /&gt;
* &#039;&#039;&#039;H8SCM-F&#039;&#039;&#039;&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
| {{center|&#039;&#039;&#039;Release&#039;&#039;&#039;}}&lt;br /&gt;
| {{center|&#039;&#039;&#039;Notes&#039;&#039;&#039;}}&lt;br /&gt;
| {{center|&#039;&#039;&#039;Download Options&#039;&#039;&#039;}}&lt;br /&gt;
|-&lt;br /&gt;
|2026.05.04-v4.11-5d336ff7176&lt;br /&gt;
|&lt;br /&gt;
* Improved power efficiency&lt;br /&gt;
* Improved SATA performance&lt;br /&gt;
* Improved thermal management&lt;br /&gt;
* Enabled PCIe ASPM support&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/5/5e/Coreboot-15h_2026.05.04-v4.11-5d336ff7176_supermicro_h8scm_seabios_ucode_matrox-oprom_vga-oproms.tar.gz 2MB]&lt;br /&gt;
|-&lt;br /&gt;
|2025.11.18-v4.11-4094163932a&lt;br /&gt;
|&lt;br /&gt;
* Partial UART support&lt;br /&gt;
** Requires the BMC to be online&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/c/c7/Coreboot-15h_2025.11.18-v4.11-4094163932a_supermicro_h8scm_seabios_ucode_matrox-oprom_vga-oproms.tar.gz 2MB]&lt;br /&gt;
|-&lt;br /&gt;
|2025.11.11-v4.11-61cbef5bdd2&lt;br /&gt;
|&lt;br /&gt;
* Minor bug fixes relating to the C32 socket&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/a/ab/Coreboot-15h_2025.11.11-v4.11-61cbef5bdd2_supermicro_h8scm_seabios_ucode_matrox-oprom_vga-oproms.tar.gz 2MB]&lt;br /&gt;
|-&lt;br /&gt;
|2025.11.09-v4.11-6f1fd5cf220&lt;br /&gt;
|&lt;br /&gt;
* Optimized HyperTransport Speed and Deemphasis&lt;br /&gt;
* Optimized RAM Power Saving&lt;br /&gt;
* Optimized RAM ECC Scrub Rates&lt;br /&gt;
* Setup Thermal Throttling&lt;br /&gt;
* Enabled Thermal Shutdown&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/2/22/Coreboot-15h_2025.11.09-v4.11-6f1fd5cf220_supermicro_h8scm_seabios_ucode_matrox-oprom_vga-oproms.tar.gz 2MB]&lt;br /&gt;
|-&lt;br /&gt;
|2025.10.31-v4.11-c71dd7896fe&lt;br /&gt;
|&lt;br /&gt;
* Enabled the IOMMU&lt;br /&gt;
* Enabled the HPET&lt;br /&gt;
* Added coreinfo and memtest&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/3/31/Coreboot-15h_2025.10.31-v4.11-c71dd7896fe_supermicro_h8scm_seabios_ucode_matrox-oprom_vga-oproms.tar.gz 2MB]&lt;br /&gt;
|-&lt;br /&gt;
|2025.04.28-v4.11-34811b78c48&lt;br /&gt;
|&lt;br /&gt;
* Fixed support for rev 1.02 motherboards&lt;br /&gt;
* Added support for UDIMM and LRDIMM memory&lt;br /&gt;
* Updated config&lt;br /&gt;
** RAM interleaving is only enabled for channels, not bank nor nodes&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/6/61/Coreboot-15h_2025.04.28-v4.11-34811b78c48_supermicro_h8scm_seabios_ucode_matrox-oprom_vga-oproms.tar.gz 2MB]&lt;br /&gt;
|-&lt;br /&gt;
|2025.03.08-v4.11-9f78cb25cd&lt;br /&gt;
|&lt;br /&gt;
* Updated config&lt;br /&gt;
** Onboard VGA is no longer primary by default&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/3/34/Coreboot-15h_2025.03.08-v4.11-9f78cb25cd_supermicro_h8scm_seabios_ucode_matrox-oprom_vga-oproms.tar.gz 2MB]&lt;br /&gt;
|-&lt;br /&gt;
|2025.02.23-v4.11-583f5e6a34&lt;br /&gt;
|&lt;br /&gt;
* Initial v4.11 AGESA release&lt;br /&gt;
** Microcode Updated&lt;br /&gt;
** Added fan control&lt;br /&gt;
** Various AGESA bugs fixed&lt;br /&gt;
** IOMMU is disabled&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/5/58/Coreboot-15h_2025.02.23-v4.11-583f5e6a34_supermicro_h8scm_seabios_ucode_matrox-oprom_vga-oproms.tar.gz 2MB]&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
=== [[Supermicro H8SGL]] ===&lt;br /&gt;
Supported motherboard variants: &lt;br /&gt;
* &#039;&#039;&#039;H8SGL&#039;&#039;&#039;&lt;br /&gt;
* &#039;&#039;&#039;H8SGL-F&#039;&#039;&#039;&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
| {{center|&#039;&#039;&#039;Release&#039;&#039;&#039;}}&lt;br /&gt;
| {{center|&#039;&#039;&#039;Notes&#039;&#039;&#039;}}&lt;br /&gt;
| {{center|&#039;&#039;&#039;Download Options&#039;&#039;&#039;}}&lt;br /&gt;
|-&lt;br /&gt;
|2026.05.04-v4.11-5d336ff7176&lt;br /&gt;
|&lt;br /&gt;
* Improved power efficiency&lt;br /&gt;
* Improved SATA performance&lt;br /&gt;
* Improved thermal management&lt;br /&gt;
* Enabled PCIe ASPM support&lt;br /&gt;
* Enabled TPM support&lt;br /&gt;
** TPM 1.2 and 2.0 are supported&lt;br /&gt;
** TPM 2.0 is enabled by default&lt;br /&gt;
** TPM measured boot is supported&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/d/d3/Coreboot-15h_2026.05.04-v4.11-5d336ff7176_supermicro_h8sgl_seabios_ucode_matrox-oprom_vga-oproms.tar.gz 2MB]&lt;br /&gt;
|-&lt;br /&gt;
|2025.11.18-v4.11-4094163932a&lt;br /&gt;
|&lt;br /&gt;
* Partial UART support&lt;br /&gt;
** Requires the BMC to be online&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/2/26/Coreboot-15h_2025.11.18-v4.11-4094163932a_supermicro_h8sgl_seabios_ucode_matrox-oprom_vga-oproms.tar.gz 2MB]&lt;br /&gt;
|-&lt;br /&gt;
|2025.11.09-v4.11-6f1fd5cf220&lt;br /&gt;
|&lt;br /&gt;
* Optimized HyperTransport Speed and Deemphasis&lt;br /&gt;
* Optimized RAM Power Saving&lt;br /&gt;
* Optimized RAM ECC Scrub Rates&lt;br /&gt;
* Setup Thermal Throttling&lt;br /&gt;
* Enabled Thermal Shutdown&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/c/cc/Coreboot-15h_2025.11.09-v4.11-6f1fd5cf220_supermicro_h8sgl_seabios_ucode_matrox-oprom_vga-oproms.tar.gz 2MB]&lt;br /&gt;
|-&lt;br /&gt;
|2025.10.31-v4.11-c71dd7896fe&lt;br /&gt;
|&lt;br /&gt;
* Enabled the IOMMU&lt;br /&gt;
* Enabled the HPET&lt;br /&gt;
* Added coreinfo and memtest&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/5/51/Coreboot-15h_2025.10.31-v4.11-c71dd7896fe_supermicro_h8sgl_seabios_ucode_matrox-oprom_vga-oproms.tar.gz 2MB]&lt;br /&gt;
|-&lt;br /&gt;
|2025.09.15-v4.11-58cfb23a680&lt;br /&gt;
|&lt;br /&gt;
* Initial release&lt;br /&gt;
** IOMMU is disabled&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/a/a4/Coreboot-15h_2025.09.15-v4.11-58cfb23a680_supermicro_h8sgl_seabios_ucode_matrox-oprom_vga-oproms.tar.gz 2MB]&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
=== [[Supermicro H8QG6]] ===&lt;br /&gt;
Supported motherboard variants:&lt;br /&gt;
* &#039;&#039;&#039;H8QGi+-F&#039;&#039;&#039;&lt;br /&gt;
* &#039;&#039;&#039;H8QG6+-F&#039;&#039;&#039;&lt;br /&gt;
Unsupported motherboard variants:&lt;br /&gt;
* &#039;&#039;&#039;H8QGi+-LN4F&#039;&#039;&#039; and &#039;&#039;&#039;H8QG7+-LN4F&#039;&#039;&#039;&lt;br /&gt;
** Support can be added if someone has either board&lt;br /&gt;
* &#039;&#039;&#039;H8QGi-F&#039;&#039;&#039;, &#039;&#039;&#039;H8QG6-F&#039;&#039;&#039;, &#039;&#039;&#039;H8QGi-LN4F&#039;&#039;&#039;, and &#039;&#039;&#039;H8QG7-LN4F&#039;&#039;&#039;&lt;br /&gt;
** Dual northbridge support is incomplete&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
| {{center|&#039;&#039;&#039;Release&#039;&#039;&#039;}}&lt;br /&gt;
| {{center|&#039;&#039;&#039;Notes&#039;&#039;&#039;}}&lt;br /&gt;
| {{center|&#039;&#039;&#039;Download Options&#039;&#039;&#039;}}&lt;br /&gt;
|-&lt;br /&gt;
|2026.05.04-v4.11-5d336ff7176&lt;br /&gt;
|&lt;br /&gt;
* Improved power efficiency&lt;br /&gt;
* Improved SATA performance&lt;br /&gt;
* Improved thermal management&lt;br /&gt;
* Enabled PCIe ASPM support&lt;br /&gt;
* Enabled TPM support&lt;br /&gt;
** TPM 1.2 and 2.0 are supported&lt;br /&gt;
** TPM 2.0 is enabled by default&lt;br /&gt;
** TPM measured boot is supported&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/5/5f/Coreboot-15h_2026.05.04-v4.11-5d336ff7176_supermicro_h8qg6_seabios_ucode_matrox-oprom_vga-oproms.tar.gz 2MB]&lt;br /&gt;
|-&lt;br /&gt;
|2026.03.13-v4.11-0b517349413&lt;br /&gt;
|&lt;br /&gt;
* Optimized HyperTransport Speed and Deemphasis&lt;br /&gt;
* Optimized RAM Power Saving&lt;br /&gt;
* Optimized RAM ECC Scrub Rates&lt;br /&gt;
* Setup Thermal Throttling&lt;br /&gt;
* Enabled Thermal Shutdown&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/c/c4/Coreboot-15h_2026.03.13-v4.11-0b517349413_supermicro_h8qg6_seabios_ucode_matrox-oprom_vga-oproms.tar.gz 2MB]&lt;br /&gt;
|-&lt;br /&gt;
|2025.10.31-v4.11-c71dd7896fe&lt;br /&gt;
|&lt;br /&gt;
* Enabled the IOMMU&lt;br /&gt;
* Enabled the HPET&lt;br /&gt;
* Added coreinfo and memtest&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/f/f9/Coreboot-15h_2025.10.31-v4.11-c71dd7896fe_supermicro_h8qg6-pm-f_seabios_ucode_matrox-oprom_vga-oproms.tar.gz 2MB]&lt;br /&gt;
|-&lt;br /&gt;
|2025.04.28-v4.11-34811b78c48&lt;br /&gt;
|&lt;br /&gt;
* Added support for UDIMM and LRDIMM memory&lt;br /&gt;
* Updated config&lt;br /&gt;
** RAM interleaving is only enabled for channels, not bank nor nodes&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/d/dc/Coreboot-15h_2025.04.28-v4.11-34811b78c48_supermicro_h8qg6-pm-f_seabios_ucode_matrox-oprom_vga-oproms.tar.gz 2MB]&lt;br /&gt;
|-&lt;br /&gt;
|2025.03.08-v4.11-9f78cb25cd&lt;br /&gt;
|&lt;br /&gt;
* Updated config&lt;br /&gt;
** Onboard VGA is no longer primary by default&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/6/65/Coreboot-15h_2025.03.08-v4.11-9f78cb25cd_supermicro_h8qg6-pm-f_seabios_ucode_matrox-oprom_vga-oproms.tar.gz 2MB]&lt;br /&gt;
|-&lt;br /&gt;
|2025.02.25-v4.11-97011b87c1&lt;br /&gt;
|&lt;br /&gt;
* Initial v4.11 AGESA release&lt;br /&gt;
** Microcode Updated&lt;br /&gt;
** Added fan control&lt;br /&gt;
** Enabled onboard SAS controller&lt;br /&gt;
** Various AGESA bugs fixed&lt;br /&gt;
** IOMMU is disabled&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/6/64/Coreboot-15h_2025.02.25-v4.11-97011b87c1_supermicro_h8qg6-pm-f_seabios_ucode_matrox-oprom_vga-oproms.tar.gz 2MB]&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
=== [[Lenovo ThinkPad X140e]] ===&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
| {{center|&#039;&#039;&#039;Release&#039;&#039;&#039;}}&lt;br /&gt;
| {{center|&#039;&#039;&#039;Notes&#039;&#039;&#039;}}&lt;br /&gt;
| {{center|&#039;&#039;&#039;Download Options&#039;&#039;&#039;}}&lt;br /&gt;
|-&lt;br /&gt;
|2026.03.29-v4.18-7ebae77863&lt;br /&gt;
|&lt;br /&gt;
* Added support for boards with the A4 CPU&lt;br /&gt;
* Enabled PCIe power saving features&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + APU-OpROM&lt;br /&gt;
** [https://15h.org/images/7/73/Coreboot-15h_2026.03.29-v4.18-7ebae77863_lenovo_x140e_seabios_ucode_apu-oprom.tar.gz 4MB]&lt;br /&gt;
|-&lt;br /&gt;
|2026.03.26-v4.18-ff66166ebf&lt;br /&gt;
|&lt;br /&gt;
* Partial support for Fn hotkeys&lt;br /&gt;
* Added memtest and coreinfo payloads&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + APU-OpROM&lt;br /&gt;
** [https://15h.org/images/0/08/Coreboot-15h_2026.03.26-v4.18-ff66166ebf_lenovo_x140e_seabios_ucode_apu-oprom.tar.gz 4MB]&lt;br /&gt;
|-&lt;br /&gt;
|2026.03.20-v4.18-60f79fa1ed&lt;br /&gt;
|&lt;br /&gt;
* Fixed speakers&lt;br /&gt;
* All USBs are  bootable&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + APU-OpROM&lt;br /&gt;
** [https://15h.org/images/7/77/Coreboot-15h_2026.03.20-v4.18-60f79fa1ed_lenovo_x140e_seabios_ucode_apu-oprom.tar.gz 4MB]&lt;br /&gt;
|-&lt;br /&gt;
|2026.03.15-v4.18-7f0a560c9f&lt;br /&gt;
|&lt;br /&gt;
* Initial release&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + APU-OpROM&lt;br /&gt;
** [https://15h.org/images/b/b0/Coreboot-15h_2026.03.15-v4.18-7f0a560c9f_lenovo_x140e_seabios_ucode_apu-oprom.tar.gz 4MB]&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
==Beta==&lt;br /&gt;
&lt;br /&gt;
=== [[ASUS F2A85-M]] ===&lt;br /&gt;
Supported motherboard variants: &lt;br /&gt;
* &#039;&#039;&#039;F2A85-M&#039;&#039;&#039;&lt;br /&gt;
* &#039;&#039;&#039;F2A85-M PRO&#039;&#039;&#039;&lt;br /&gt;
* &#039;&#039;&#039;F2A85-M LE&#039;&#039;&#039;&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
| {{center|&#039;&#039;&#039;Release&#039;&#039;&#039;}}&lt;br /&gt;
| {{center|&#039;&#039;&#039;Notes&#039;&#039;&#039;}}&lt;br /&gt;
| {{center|&#039;&#039;&#039;Download Options&#039;&#039;&#039;}}&lt;br /&gt;
|-&lt;br /&gt;
|2026.04.06-v4.18-d36fa395e4&lt;br /&gt;
|&lt;br /&gt;
* Setup support for the iGPU and dGPU&lt;br /&gt;
* Fixed an IOAPIC ID calculation&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + APU-OpROM + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/3/3d/Coreboot-15h_2026.04.06-v4.18-d36fa395e4_asus_f2a85m_seabios_ucode_apu-oprom_vga-oproms.tar.gz 8MB F2A85-M]&lt;br /&gt;
** [https://15h.org/images/f/fc/Coreboot-15h_2026.04.06-v4.18-d36fa395e4_asus_f2a85m-pro_seabios_ucode_apu-oprom_vga-oproms.tar.gz 8MB F2A85-M PRO]&lt;br /&gt;
** [https://15h.org/images/e/e6/Coreboot-15h_2026.04.06-v4.18-d36fa395e4_asus_f2a85m-le_seabios_ucode_apu-oprom_vga-oproms.tar.gz 8MB F2A85-M LE]&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
=== [[ASUS Sabertooth 990FX R2.0]] ===&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
| {{center|&#039;&#039;&#039;Release&#039;&#039;&#039;}}&lt;br /&gt;
| {{center|&#039;&#039;&#039;Notes&#039;&#039;&#039;}}&lt;br /&gt;
| {{center|&#039;&#039;&#039;Download Options&#039;&#039;&#039;}}&lt;br /&gt;
|-&lt;br /&gt;
|2026.05.11-v4.11-0fe4a6552b8&lt;br /&gt;
|&lt;br /&gt;
* Initial v4.11 AGESA release&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/6/62/Coreboot-15h_2026.05.11-v4.11-0fe4a6552b8_asus_sabertooth-990fx-r2_seabios_ucode_vga-oproms_8mb.tar.gz 8MB]&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Third-Party Support ==&lt;br /&gt;
These boards can be built using coreboot-15h, but are currently best-supported by Mike Banon&#039;s &amp;lt;code&amp;gt;restore_agesa.sh&amp;lt;/code&amp;gt; script.&lt;br /&gt;
&lt;br /&gt;
=== Lenovo G505s ===&lt;br /&gt;
See [https://dangerousprototypes.com/docs/Lenovo_G505S_hacking#restore_agesa.sh here]&lt;br /&gt;
&lt;br /&gt;
=== ASUS A88XM-E ===&lt;br /&gt;
See [https://dangerousprototypes.com/docs/Lenovo_G505S_hacking#restore_agesa.sh here]&lt;br /&gt;
&lt;br /&gt;
=== ASUS AM1I-A ===&lt;br /&gt;
See [https://dangerousprototypes.com/docs/Lenovo_G505S_hacking#restore_agesa.sh here]&lt;br /&gt;
&lt;br /&gt;
== Deprecated ==&lt;br /&gt;
&lt;br /&gt;
=== [[KGPE-D16 (Raptor)|ASUS KGPE-D16 (Raptor)]] ===&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
| {{center|&#039;&#039;&#039;Release&#039;&#039;&#039;}}&lt;br /&gt;
| {{center|&#039;&#039;&#039;Notes&#039;&#039;&#039;}}&lt;br /&gt;
| {{center|&#039;&#039;&#039;Download Options&#039;&#039;&#039;}}&lt;br /&gt;
|-&lt;br /&gt;
|2025.03.08-v4.11-9f78cb25cd&lt;br /&gt;
|&lt;br /&gt;
* Updated configs&lt;br /&gt;
** Sets default CMOS settings each boot&lt;br /&gt;
** Expanded CBFS for 16MB&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/b/b7/Coreboot-15h_2025.03.08-v4.11-9f78cb25cd_asus_kgpe-d16_seabios_ucode_ast2050-oprom_vga-oproms_16mb.tar.gz 16MB]&lt;br /&gt;
* SeaBIOS + uCode&lt;br /&gt;
** [https://15h.org/images/a/aa/Coreboot-15h_2025.03.08-v4.11-9f78cb25cd_asus_kgpe-d16_seabios_ucode_no-oproms_16mb.tar.gz 16MB]&lt;br /&gt;
* SeaBIOS (blob-free)&lt;br /&gt;
** [https://15h.org/images/7/72/Coreboot-15h_2025.03.08-v4.11-9f78cb25cd_asus_kgpe-d16_seabios_no-ucode_no-oproms_16mb.tar.gz 16MB]&lt;br /&gt;
|-&lt;br /&gt;
|2025.02.23-v4.11-583f5e6a34&lt;br /&gt;
|&lt;br /&gt;
* Added fan control&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/5/59/Coreboot-15h_2025.02.23-v4.11-583f5e6a34_asus_kgpe-d16_seabios_ucode_ast2050-oprom_vga-oproms_2mb.tar.gz 2MB] [https://15h.org/images/a/af/Coreboot-15h_2025.02.23-v4.11-583f5e6a34_asus_kgpe-d16_seabios_ucode_ast2050-oprom_vga-oproms_16mb.tar.gz 16MB]&lt;br /&gt;
* SeaBIOS + uCode&lt;br /&gt;
** [https://15h.org/images/d/de/Coreboot-15h_2025.02.23-v4.11-583f5e6a34_asus_kgpe-d16_seabios_ucode_no-oproms_2mb.tar.gz 2MB] [https://15h.org/images/a/af/Coreboot-15h_2025.02.23-v4.11-583f5e6a34_asus_kgpe-d16_seabios_ucode_no-oproms_16mb.tar.gz 16MB]&lt;br /&gt;
* SeaBIOS (blob-free)&lt;br /&gt;
** [https://15h.org/images/d/dc/Coreboot-15h_2025.02.23-v4.11-583f5e6a34_asus_kgpe-d16_seabios_no-ucode_no-oproms_2mb.tar.gz 2MB] [https://15h.org/images/4/4f/Coreboot-15h_2025.02.23-v4.11-583f5e6a34_asus_kgpe-d16_seabios_no-ucode_no-oproms_16mb.tar.gz 16MB]&lt;br /&gt;
|-&lt;br /&gt;
|2024.09.16-v4.11-d176edf4ae&lt;br /&gt;
|&lt;br /&gt;
* Added more configuration variants&lt;br /&gt;
* Removed coreinfo as a secondary payload&lt;br /&gt;
* coreboot codebase unchanged&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/3/35/Coreboot-15h_2024.09.16-v4.11-d176edf4ae_asus_kgpe-d16_seabios_ucode_ast2050-oprom_vga-oproms_2mb.tar.gz 2MB] [https://15h.org/images/3/32/Coreboot-15h_2024.09.16-v4.11-d176edf4ae_asus_kgpe-d16_seabios_ucode_ast2050-oprom_vga-oproms_16mb.tar.gz 16MB]&lt;br /&gt;
* SeaBIOS + uCode&lt;br /&gt;
** [https://15h.org/images/0/01/Coreboot-15h_2024.09.16-v4.11-d176edf4ae_asus_kgpe-d16_seabios_ucode_no-oproms_2mb.tar.gz 2MB] [https://15h.org/images/e/e6/Coreboot-15h_2024.09.16-v4.11-d176edf4ae_asus_kgpe-d16_seabios_ucode_no-oproms_16mb.tar.gz 16MB]&lt;br /&gt;
* SeaBIOS (blob-free)&lt;br /&gt;
** [https://15h.org/images/5/5d/Coreboot-15h_2024.09.16-v4.11-d176edf4ae_asus_kgpe-d16_seabios_no-ucode_no-oproms_2mb.tar.gz 2MB] [https://15h.org/images/5/5a/Coreboot-15h_2024.09.16-v4.11-d176edf4ae_asus_kgpe-d16_seabios_no-ucode_no-oproms_16mb.tar.gz 16MB]&lt;br /&gt;
|-&lt;br /&gt;
|&lt;br /&gt;
2024.09.14-v4.11-065549759c&lt;br /&gt;
|&lt;br /&gt;
* Improved board stability&lt;br /&gt;
** Fixed bugs in RAM initialization code&lt;br /&gt;
** Fixed HyperTransport Deemphasis values&lt;br /&gt;
|&lt;br /&gt;
* SeaBIOS + uCode + VGA-OpROMs&lt;br /&gt;
** [https://15h.org/images/1/18/Coreboot-15h_2024.09.14-v4.11-065549759c_asus_kgpe-d16_seabios_ucode_ast2050-oprom_vga-oproms_2mb.tar.gz 2MB] [https://15h.org/images/d/d4/Coreboot-15h_2024.09.14-v4.11-065549759c_asus_kgpe-d16_seabios_ucode_ast2050-oprom_vga-oproms_16mb.tar.gz 16MB]&lt;br /&gt;
|}&lt;/div&gt;</summary>
		<author><name>Mrothfuss</name></author>
	</entry>
	<entry>
		<id>https://15h.org/index.php?title=AMD_Codenames&amp;diff=2911</id>
		<title>AMD Codenames</title>
		<link rel="alternate" type="text/html" href="https://15h.org/index.php?title=AMD_Codenames&amp;diff=2911"/>
		<updated>2026-05-31T19:54:53Z</updated>

		<summary type="html">&lt;p&gt;Mrothfuss: /* AMD Platforms */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;This is an incomplete list of AMD Codenames.&lt;br /&gt;
&lt;br /&gt;
== AMD Platforms ==&lt;br /&gt;
* &#039;&#039;&#039;Tigris&#039;&#039;&#039;, K10 Socket S1g3 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Danube&#039;&#039;&#039;, K10 Socket S1g4 Platforms&lt;br /&gt;
* &#039;&#039;&#039;DanNi&#039;&#039;&#039;, K10 Socket S1g4 and ASB2 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Nile&#039;&#039;&#039;, K10 Socket ASB2 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Dragon&#039;&#039;&#039;, K10 Socket AM3 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Lynx&#039;&#039;&#039;, Llano Socket FM1 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Sabine&#039;&#039;&#039;, Llano Socket FS1 and FP1 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Brazos&#039;&#039;&#039;, Bobcat Socket FT1 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Deccan&#039;&#039;&#039;, Bobcat Socket FT2 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Scorpius&#039;&#039;&#039;, K10/Bulldozer/Piledriver Socket AM3+ Platforms&lt;br /&gt;
* &#039;&#039;&#039;SanMarino&#039;&#039;&#039;, K10/Bulldozer/Piledriver Socket C32 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Maranello&#039;&#039;&#039;, K10/Bulldozer/Piledriver Socket G34 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Comal&#039;&#039;&#039;, Trinity/Richland Socket FS1 and FP2 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Virgo&#039;&#039;&#039;, Trinity/Richland Socket FM2 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Kerala&#039;&#039;&#039;, Kabini Socket FT3 Platforms&lt;br /&gt;
&lt;br /&gt;
== AMD 10h K10 CPUs ==&lt;br /&gt;
* [[K10|Detailed article]]&lt;br /&gt;
&lt;br /&gt;
=== DR, Deerhound ===&lt;br /&gt;
* [[K10 dies 65 nm|article: K10 dies 65 nm]]&lt;br /&gt;
==== Socket AM2+ ====&lt;br /&gt;
* Athlon X2 &amp;quot;Kuma&amp;quot;&lt;br /&gt;
* Phenom X3 &amp;quot;Toliman&amp;quot;&lt;br /&gt;
* Phenom X4 &amp;quot;Agena&amp;quot;&lt;br /&gt;
* Opteron 1300 &amp;quot;Budapest&amp;quot;&lt;br /&gt;
==== Socket Fr2 ====&lt;br /&gt;
* Opteron 2300/8300 &amp;quot;Barcelona&amp;quot;&lt;br /&gt;
&lt;br /&gt;
=== RB, Ridgeback ===&lt;br /&gt;
* [[K10 dies 45 nm|article: K10 dies 45 nm]]&lt;br /&gt;
==== Socket AM2+ ====&lt;br /&gt;
* Athlon X2&lt;br /&gt;
* Phenom II X3/X4&lt;br /&gt;
==== Socket AM3 ====&lt;br /&gt;
* Phenom II XLT (embedded)&lt;br /&gt;
* Phenom II X2/X3/X4&lt;br /&gt;
* Opteron 1300 &amp;quot;Suzuka&amp;quot;&lt;br /&gt;
==== Socket Fr2/Fr5 ====&lt;br /&gt;
* Opteron 2300/8300 &amp;quot;Shanghai&amp;quot;&lt;br /&gt;
&lt;br /&gt;
=== BL, Bloodhound ===&lt;br /&gt;
* [[K10 dies 45 nm|article: K10 dies 45 nm]]&lt;br /&gt;
==== Socket AM3 ====&lt;br /&gt;
* Athlon II X2/X3/X4&lt;br /&gt;
&lt;br /&gt;
=== DA, Dachshund ===&lt;br /&gt;
* [[K10 dies 45 nm|article: K10 dies 45 nm]]&lt;br /&gt;
==== Socket ASB2 ====&lt;br /&gt;
* V-Series &lt;br /&gt;
* Athlon II Neo N/K/R&lt;br /&gt;
* Turion II Neo N/K &amp;quot;Geneva&amp;quot;&lt;br /&gt;
==== Socket S1g3/S1g4 ====&lt;br /&gt;
* Turion II M500 &lt;br /&gt;
* Turion II Ultra M600 &amp;quot;Caspian&amp;quot;&lt;br /&gt;
* V-Series&lt;br /&gt;
* Sempron M100&lt;br /&gt;
* Athlon II M300&lt;br /&gt;
* Phenom II N/P/X&lt;br /&gt;
==== Socket AM3 ====&lt;br /&gt;
* Sempron&lt;br /&gt;
* Sempron X2&lt;br /&gt;
* Athlon II XL &amp;amp; XLT (embedded)&lt;br /&gt;
* Athlon II&lt;br /&gt;
* Athlon II X2&lt;br /&gt;
&lt;br /&gt;
=== HY, Hydra ===&lt;br /&gt;
* [[K10 dies 45 nm|article: K10 dies 45 nm]]&lt;br /&gt;
==== Socket Fr6 ====&lt;br /&gt;
* Opteron 2400/8400 &amp;quot;Istanbul&amp;quot;&lt;br /&gt;
==== Socket C32 ====&lt;br /&gt;
* Opteron 4100 &amp;quot;Lisbon&amp;quot;&lt;br /&gt;
==== Socket G34 ====&lt;br /&gt;
* Opteron 6100 &amp;quot;Magny Cours&amp;quot;&lt;br /&gt;
=== PH, Pharaoh Hound ===&lt;br /&gt;
* [[K10 dies 45 nm|article: K10 dies 45 nm]]&lt;br /&gt;
==== Socket AM3 ====&lt;br /&gt;
* Athlon II X4&lt;br /&gt;
* Phenom II X4 &amp;quot;Zosma&amp;quot;&lt;br /&gt;
* Phenom II X6 &amp;quot;Thuban&amp;quot;&lt;br /&gt;
== AMD 12h K10 CPUs ==&lt;br /&gt;
=== LN, Llano ===&lt;br /&gt;
==== Socket FM1 ====&lt;br /&gt;
* A4, A6, A8 3000 Series&lt;br /&gt;
* Athlon II X4 600 Series&lt;br /&gt;
* E2-3200&lt;br /&gt;
==== Socket FS1 ====&lt;br /&gt;
* A4, A6, A8 3000 Series (Mobile)&lt;br /&gt;
* E2-3000M&lt;br /&gt;
&lt;br /&gt;
== AMD 14h Bobcat CPUs ==&lt;br /&gt;
=== ON, Ontario ===&lt;br /&gt;
==== Socket FT1 ====&lt;br /&gt;
* C-30, C-50, C-60, C-70&lt;br /&gt;
=== ??, Zacate ===&lt;br /&gt;
=== ??, Desna ===&lt;br /&gt;
== AMD 15h Bulldozer CPUs ==&lt;br /&gt;
=== OR, Orochi ===&lt;br /&gt;
==== Socket AM3+ ====&lt;br /&gt;
* AMD FX &amp;quot;Zambezi&amp;quot;&lt;br /&gt;
* Opteron 3200 &amp;quot;Zurich&amp;quot;&lt;br /&gt;
==== Socket C32 ====&lt;br /&gt;
* Opteron 4200 &amp;quot;Valencia&amp;quot;&lt;br /&gt;
==== Socket G34 ====&lt;br /&gt;
* Opteron 6200 &amp;quot;Interlagos&amp;quot;&lt;br /&gt;
== AMD 15h Piledriver CPUs ==&lt;br /&gt;
=== OR, Orochi ===&lt;br /&gt;
==== Socket AM3+ ====&lt;br /&gt;
* AMD FX &amp;quot;Vishera&amp;quot;&lt;br /&gt;
* Opteron 3300 &amp;quot;Delhi&amp;quot;&lt;br /&gt;
==== Socket C32 ====&lt;br /&gt;
* Opteron 4300 &amp;quot;Seoul&amp;quot;&lt;br /&gt;
==== Socket G34 ====&lt;br /&gt;
* Opteron 6300 &amp;quot;Abu Dhabi&amp;quot; and &amp;quot;Warsaw&amp;quot;&lt;br /&gt;
=== TN, Trinity ===&lt;br /&gt;
==== Socket FM2 ====&lt;br /&gt;
* A4, A6, A8, A10 5000 Series&lt;br /&gt;
* Sempron X2 240&lt;br /&gt;
* Athlon X2 340&lt;br /&gt;
* Athlon X4 730, 740, 750K&lt;br /&gt;
* FirePro A300, A320&lt;br /&gt;
==== Socket FP2 ====&lt;br /&gt;
* A4, A6, A8, A10 4000 Series (Mobile)&lt;br /&gt;
==== Socket FS1r2 ====&lt;br /&gt;
* A4, A6, A8, A10 4000 Series (Mobile)&lt;br /&gt;
=== RL, Richland ===&lt;br /&gt;
==== Socket FM2 ====&lt;br /&gt;
* A4, A6, A8, A10 6000 Series&lt;br /&gt;
* A4 PRO-7300B&lt;br /&gt;
* Athlon X4 750, 760K&lt;br /&gt;
==== Socket FP2 ====&lt;br /&gt;
* A4, A6, A8, A10 5000 Series (Mobile)&lt;br /&gt;
==== Socket FS1r2 ====&lt;br /&gt;
* A4, A6, A8, A10 5000 Series (Mobile)&lt;br /&gt;
=== KM, Komodo ===&lt;br /&gt;
==== Socket FM2 ====&lt;br /&gt;
* Canceled&lt;br /&gt;
== AMD 15h Steamroller CPUs ==&lt;br /&gt;
=== KV, Kaveri ===&lt;br /&gt;
=== GV, Godavari ===&lt;br /&gt;
&lt;br /&gt;
== AMD 15h Excavator CPUs ==&lt;br /&gt;
=== CZ, Carrizo ===&lt;br /&gt;
=== BR, Bristol Ridge ===&lt;br /&gt;
=== ST, Stoney Ridge ===&lt;br /&gt;
&lt;br /&gt;
== AMD 16h Jaguar CPUs ==&lt;br /&gt;
=== KB, Kabini ===&lt;br /&gt;
==== Socket AM1 ====&lt;br /&gt;
==== Socket FT3 ====&lt;br /&gt;
== AMD 16h Puma CPUs ==&lt;br /&gt;
=== ML, Mullins ===&lt;br /&gt;
==== Socket AM1 ====&lt;br /&gt;
==== Socket FT3b ====&lt;/div&gt;</summary>
		<author><name>Mrothfuss</name></author>
	</entry>
	<entry>
		<id>https://15h.org/index.php?title=AMD_Codenames&amp;diff=2910</id>
		<title>AMD Codenames</title>
		<link rel="alternate" type="text/html" href="https://15h.org/index.php?title=AMD_Codenames&amp;diff=2910"/>
		<updated>2026-05-31T19:54:23Z</updated>

		<summary type="html">&lt;p&gt;Mrothfuss: /* AMD Platforms */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;This is an incomplete list of AMD Codenames.&lt;br /&gt;
&lt;br /&gt;
== AMD Platforms ==&lt;br /&gt;
* &#039;&#039;&#039;Tigris&#039;&#039;&#039;, K10 Socket S1g3 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Danube&#039;&#039;&#039;, K10 Socket S1g4 Platforms&lt;br /&gt;
* &#039;&#039;&#039;DanNi&#039;&#039;&#039;, K10 Socket S1g4 and ASB2 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Nile&#039;&#039;&#039;, K10 Socket ASB2 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Dragon&#039;&#039;&#039;, K10 Socket AM3 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Lynx&#039;&#039;&#039;, Llano Socket FM1 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Sabine&#039;&#039;&#039;, Llano Socket FS1 and FP1 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Brazos&#039;&#039;&#039;, Bobcat Socket FT1 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Deccan&#039;&#039;&#039;, Bobcat Socket FT2 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Scorpius&#039;&#039;&#039;, K10/Bulldozer/Piledriver Socket AM3 and AM3+ Platforms&lt;br /&gt;
* &#039;&#039;&#039;SanMarino&#039;&#039;&#039;, K10/Bulldozer/Piledriver Socket C32 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Maranello&#039;&#039;&#039;, K10/Bulldozer/Piledriver Socket G34 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Comal&#039;&#039;&#039;, Trinity/Richland Socket FS1 and FP2 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Virgo&#039;&#039;&#039;, Trinity/Richland Socket FM2 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Kerala&#039;&#039;&#039;, Kabini Socket FT3 Platforms&lt;br /&gt;
&lt;br /&gt;
== AMD 10h K10 CPUs ==&lt;br /&gt;
* [[K10|Detailed article]]&lt;br /&gt;
&lt;br /&gt;
=== DR, Deerhound ===&lt;br /&gt;
* [[K10 dies 65 nm|article: K10 dies 65 nm]]&lt;br /&gt;
==== Socket AM2+ ====&lt;br /&gt;
* Athlon X2 &amp;quot;Kuma&amp;quot;&lt;br /&gt;
* Phenom X3 &amp;quot;Toliman&amp;quot;&lt;br /&gt;
* Phenom X4 &amp;quot;Agena&amp;quot;&lt;br /&gt;
* Opteron 1300 &amp;quot;Budapest&amp;quot;&lt;br /&gt;
==== Socket Fr2 ====&lt;br /&gt;
* Opteron 2300/8300 &amp;quot;Barcelona&amp;quot;&lt;br /&gt;
&lt;br /&gt;
=== RB, Ridgeback ===&lt;br /&gt;
* [[K10 dies 45 nm|article: K10 dies 45 nm]]&lt;br /&gt;
==== Socket AM2+ ====&lt;br /&gt;
* Athlon X2&lt;br /&gt;
* Phenom II X3/X4&lt;br /&gt;
==== Socket AM3 ====&lt;br /&gt;
* Phenom II XLT (embedded)&lt;br /&gt;
* Phenom II X2/X3/X4&lt;br /&gt;
* Opteron 1300 &amp;quot;Suzuka&amp;quot;&lt;br /&gt;
==== Socket Fr2/Fr5 ====&lt;br /&gt;
* Opteron 2300/8300 &amp;quot;Shanghai&amp;quot;&lt;br /&gt;
&lt;br /&gt;
=== BL, Bloodhound ===&lt;br /&gt;
* [[K10 dies 45 nm|article: K10 dies 45 nm]]&lt;br /&gt;
==== Socket AM3 ====&lt;br /&gt;
* Athlon II X2/X3/X4&lt;br /&gt;
&lt;br /&gt;
=== DA, Dachshund ===&lt;br /&gt;
* [[K10 dies 45 nm|article: K10 dies 45 nm]]&lt;br /&gt;
==== Socket ASB2 ====&lt;br /&gt;
* V-Series &lt;br /&gt;
* Athlon II Neo N/K/R&lt;br /&gt;
* Turion II Neo N/K &amp;quot;Geneva&amp;quot;&lt;br /&gt;
==== Socket S1g3/S1g4 ====&lt;br /&gt;
* Turion II M500 &lt;br /&gt;
* Turion II Ultra M600 &amp;quot;Caspian&amp;quot;&lt;br /&gt;
* V-Series&lt;br /&gt;
* Sempron M100&lt;br /&gt;
* Athlon II M300&lt;br /&gt;
* Phenom II N/P/X&lt;br /&gt;
==== Socket AM3 ====&lt;br /&gt;
* Sempron&lt;br /&gt;
* Sempron X2&lt;br /&gt;
* Athlon II XL &amp;amp; XLT (embedded)&lt;br /&gt;
* Athlon II&lt;br /&gt;
* Athlon II X2&lt;br /&gt;
&lt;br /&gt;
=== HY, Hydra ===&lt;br /&gt;
* [[K10 dies 45 nm|article: K10 dies 45 nm]]&lt;br /&gt;
==== Socket Fr6 ====&lt;br /&gt;
* Opteron 2400/8400 &amp;quot;Istanbul&amp;quot;&lt;br /&gt;
==== Socket C32 ====&lt;br /&gt;
* Opteron 4100 &amp;quot;Lisbon&amp;quot;&lt;br /&gt;
==== Socket G34 ====&lt;br /&gt;
* Opteron 6100 &amp;quot;Magny Cours&amp;quot;&lt;br /&gt;
=== PH, Pharaoh Hound ===&lt;br /&gt;
* [[K10 dies 45 nm|article: K10 dies 45 nm]]&lt;br /&gt;
==== Socket AM3 ====&lt;br /&gt;
* Athlon II X4&lt;br /&gt;
* Phenom II X4 &amp;quot;Zosma&amp;quot;&lt;br /&gt;
* Phenom II X6 &amp;quot;Thuban&amp;quot;&lt;br /&gt;
== AMD 12h K10 CPUs ==&lt;br /&gt;
=== LN, Llano ===&lt;br /&gt;
==== Socket FM1 ====&lt;br /&gt;
* A4, A6, A8 3000 Series&lt;br /&gt;
* Athlon II X4 600 Series&lt;br /&gt;
* E2-3200&lt;br /&gt;
==== Socket FS1 ====&lt;br /&gt;
* A4, A6, A8 3000 Series (Mobile)&lt;br /&gt;
* E2-3000M&lt;br /&gt;
&lt;br /&gt;
== AMD 14h Bobcat CPUs ==&lt;br /&gt;
=== ON, Ontario ===&lt;br /&gt;
==== Socket FT1 ====&lt;br /&gt;
* C-30, C-50, C-60, C-70&lt;br /&gt;
=== ??, Zacate ===&lt;br /&gt;
=== ??, Desna ===&lt;br /&gt;
== AMD 15h Bulldozer CPUs ==&lt;br /&gt;
=== OR, Orochi ===&lt;br /&gt;
==== Socket AM3+ ====&lt;br /&gt;
* AMD FX &amp;quot;Zambezi&amp;quot;&lt;br /&gt;
* Opteron 3200 &amp;quot;Zurich&amp;quot;&lt;br /&gt;
==== Socket C32 ====&lt;br /&gt;
* Opteron 4200 &amp;quot;Valencia&amp;quot;&lt;br /&gt;
==== Socket G34 ====&lt;br /&gt;
* Opteron 6200 &amp;quot;Interlagos&amp;quot;&lt;br /&gt;
== AMD 15h Piledriver CPUs ==&lt;br /&gt;
=== OR, Orochi ===&lt;br /&gt;
==== Socket AM3+ ====&lt;br /&gt;
* AMD FX &amp;quot;Vishera&amp;quot;&lt;br /&gt;
* Opteron 3300 &amp;quot;Delhi&amp;quot;&lt;br /&gt;
==== Socket C32 ====&lt;br /&gt;
* Opteron 4300 &amp;quot;Seoul&amp;quot;&lt;br /&gt;
==== Socket G34 ====&lt;br /&gt;
* Opteron 6300 &amp;quot;Abu Dhabi&amp;quot; and &amp;quot;Warsaw&amp;quot;&lt;br /&gt;
=== TN, Trinity ===&lt;br /&gt;
==== Socket FM2 ====&lt;br /&gt;
* A4, A6, A8, A10 5000 Series&lt;br /&gt;
* Sempron X2 240&lt;br /&gt;
* Athlon X2 340&lt;br /&gt;
* Athlon X4 730, 740, 750K&lt;br /&gt;
* FirePro A300, A320&lt;br /&gt;
==== Socket FP2 ====&lt;br /&gt;
* A4, A6, A8, A10 4000 Series (Mobile)&lt;br /&gt;
==== Socket FS1r2 ====&lt;br /&gt;
* A4, A6, A8, A10 4000 Series (Mobile)&lt;br /&gt;
=== RL, Richland ===&lt;br /&gt;
==== Socket FM2 ====&lt;br /&gt;
* A4, A6, A8, A10 6000 Series&lt;br /&gt;
* A4 PRO-7300B&lt;br /&gt;
* Athlon X4 750, 760K&lt;br /&gt;
==== Socket FP2 ====&lt;br /&gt;
* A4, A6, A8, A10 5000 Series (Mobile)&lt;br /&gt;
==== Socket FS1r2 ====&lt;br /&gt;
* A4, A6, A8, A10 5000 Series (Mobile)&lt;br /&gt;
=== KM, Komodo ===&lt;br /&gt;
==== Socket FM2 ====&lt;br /&gt;
* Canceled&lt;br /&gt;
== AMD 15h Steamroller CPUs ==&lt;br /&gt;
=== KV, Kaveri ===&lt;br /&gt;
=== GV, Godavari ===&lt;br /&gt;
&lt;br /&gt;
== AMD 15h Excavator CPUs ==&lt;br /&gt;
=== CZ, Carrizo ===&lt;br /&gt;
=== BR, Bristol Ridge ===&lt;br /&gt;
=== ST, Stoney Ridge ===&lt;br /&gt;
&lt;br /&gt;
== AMD 16h Jaguar CPUs ==&lt;br /&gt;
=== KB, Kabini ===&lt;br /&gt;
==== Socket AM1 ====&lt;br /&gt;
==== Socket FT3 ====&lt;br /&gt;
== AMD 16h Puma CPUs ==&lt;br /&gt;
=== ML, Mullins ===&lt;br /&gt;
==== Socket AM1 ====&lt;br /&gt;
==== Socket FT3b ====&lt;/div&gt;</summary>
		<author><name>Mrothfuss</name></author>
	</entry>
	<entry>
		<id>https://15h.org/index.php?title=AMD_Codenames&amp;diff=2909</id>
		<title>AMD Codenames</title>
		<link rel="alternate" type="text/html" href="https://15h.org/index.php?title=AMD_Codenames&amp;diff=2909"/>
		<updated>2026-05-31T19:53:55Z</updated>

		<summary type="html">&lt;p&gt;Mrothfuss: /* AMD 12h K10 CPUs */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;This is an incomplete list of AMD Codenames.&lt;br /&gt;
&lt;br /&gt;
== AMD Platforms ==&lt;br /&gt;
* &#039;&#039;&#039;Tigris&#039;&#039;&#039;, K10 Socket S1g3 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Danube&#039;&#039;&#039;, K10 Socket S1g4 Platforms&lt;br /&gt;
* &#039;&#039;&#039;DanNi&#039;&#039;&#039;, K10 Socket S1g4 and ASB2 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Nile&#039;&#039;&#039;, K10 Socket ASB2 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Dragon&#039;&#039;&#039;, K10 Socket AM3 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Lynx&#039;&#039;&#039;, Llano Socket FM1 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Sabine&#039;&#039;&#039;, Llano Socket FS1 and FP1 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Brazos&#039;&#039;&#039;, Bobcat Socket FT1 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Deccan&#039;&#039;&#039;, Bobcat Socket FT2 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Scorpius&#039;&#039;&#039;, K10/Bulldozer/Piledriver Socket AM3 and AM3+ Platforms&lt;br /&gt;
* &#039;&#039;&#039;SanMarino&#039;&#039;&#039;, K10/Bulldozer/Piledriver Socket C32 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Maranello&#039;&#039;&#039;, K10/Bulldozer/Piledriver Socket G34 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Comal&#039;&#039;&#039;, Trinity Socket FS1 and FP2 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Virgo&#039;&#039;&#039;, Trinity Socket FM2 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Kerala&#039;&#039;&#039;, Kabini Socket FT3 Platforms&lt;br /&gt;
&lt;br /&gt;
== AMD 10h K10 CPUs ==&lt;br /&gt;
* [[K10|Detailed article]]&lt;br /&gt;
&lt;br /&gt;
=== DR, Deerhound ===&lt;br /&gt;
* [[K10 dies 65 nm|article: K10 dies 65 nm]]&lt;br /&gt;
==== Socket AM2+ ====&lt;br /&gt;
* Athlon X2 &amp;quot;Kuma&amp;quot;&lt;br /&gt;
* Phenom X3 &amp;quot;Toliman&amp;quot;&lt;br /&gt;
* Phenom X4 &amp;quot;Agena&amp;quot;&lt;br /&gt;
* Opteron 1300 &amp;quot;Budapest&amp;quot;&lt;br /&gt;
==== Socket Fr2 ====&lt;br /&gt;
* Opteron 2300/8300 &amp;quot;Barcelona&amp;quot;&lt;br /&gt;
&lt;br /&gt;
=== RB, Ridgeback ===&lt;br /&gt;
* [[K10 dies 45 nm|article: K10 dies 45 nm]]&lt;br /&gt;
==== Socket AM2+ ====&lt;br /&gt;
* Athlon X2&lt;br /&gt;
* Phenom II X3/X4&lt;br /&gt;
==== Socket AM3 ====&lt;br /&gt;
* Phenom II XLT (embedded)&lt;br /&gt;
* Phenom II X2/X3/X4&lt;br /&gt;
* Opteron 1300 &amp;quot;Suzuka&amp;quot;&lt;br /&gt;
==== Socket Fr2/Fr5 ====&lt;br /&gt;
* Opteron 2300/8300 &amp;quot;Shanghai&amp;quot;&lt;br /&gt;
&lt;br /&gt;
=== BL, Bloodhound ===&lt;br /&gt;
* [[K10 dies 45 nm|article: K10 dies 45 nm]]&lt;br /&gt;
==== Socket AM3 ====&lt;br /&gt;
* Athlon II X2/X3/X4&lt;br /&gt;
&lt;br /&gt;
=== DA, Dachshund ===&lt;br /&gt;
* [[K10 dies 45 nm|article: K10 dies 45 nm]]&lt;br /&gt;
==== Socket ASB2 ====&lt;br /&gt;
* V-Series &lt;br /&gt;
* Athlon II Neo N/K/R&lt;br /&gt;
* Turion II Neo N/K &amp;quot;Geneva&amp;quot;&lt;br /&gt;
==== Socket S1g3/S1g4 ====&lt;br /&gt;
* Turion II M500 &lt;br /&gt;
* Turion II Ultra M600 &amp;quot;Caspian&amp;quot;&lt;br /&gt;
* V-Series&lt;br /&gt;
* Sempron M100&lt;br /&gt;
* Athlon II M300&lt;br /&gt;
* Phenom II N/P/X&lt;br /&gt;
==== Socket AM3 ====&lt;br /&gt;
* Sempron&lt;br /&gt;
* Sempron X2&lt;br /&gt;
* Athlon II XL &amp;amp; XLT (embedded)&lt;br /&gt;
* Athlon II&lt;br /&gt;
* Athlon II X2&lt;br /&gt;
&lt;br /&gt;
=== HY, Hydra ===&lt;br /&gt;
* [[K10 dies 45 nm|article: K10 dies 45 nm]]&lt;br /&gt;
==== Socket Fr6 ====&lt;br /&gt;
* Opteron 2400/8400 &amp;quot;Istanbul&amp;quot;&lt;br /&gt;
==== Socket C32 ====&lt;br /&gt;
* Opteron 4100 &amp;quot;Lisbon&amp;quot;&lt;br /&gt;
==== Socket G34 ====&lt;br /&gt;
* Opteron 6100 &amp;quot;Magny Cours&amp;quot;&lt;br /&gt;
=== PH, Pharaoh Hound ===&lt;br /&gt;
* [[K10 dies 45 nm|article: K10 dies 45 nm]]&lt;br /&gt;
==== Socket AM3 ====&lt;br /&gt;
* Athlon II X4&lt;br /&gt;
* Phenom II X4 &amp;quot;Zosma&amp;quot;&lt;br /&gt;
* Phenom II X6 &amp;quot;Thuban&amp;quot;&lt;br /&gt;
== AMD 12h K10 CPUs ==&lt;br /&gt;
=== LN, Llano ===&lt;br /&gt;
==== Socket FM1 ====&lt;br /&gt;
* A4, A6, A8 3000 Series&lt;br /&gt;
* Athlon II X4 600 Series&lt;br /&gt;
* E2-3200&lt;br /&gt;
==== Socket FS1 ====&lt;br /&gt;
* A4, A6, A8 3000 Series (Mobile)&lt;br /&gt;
* E2-3000M&lt;br /&gt;
&lt;br /&gt;
== AMD 14h Bobcat CPUs ==&lt;br /&gt;
=== ON, Ontario ===&lt;br /&gt;
==== Socket FT1 ====&lt;br /&gt;
* C-30, C-50, C-60, C-70&lt;br /&gt;
=== ??, Zacate ===&lt;br /&gt;
=== ??, Desna ===&lt;br /&gt;
== AMD 15h Bulldozer CPUs ==&lt;br /&gt;
=== OR, Orochi ===&lt;br /&gt;
==== Socket AM3+ ====&lt;br /&gt;
* AMD FX &amp;quot;Zambezi&amp;quot;&lt;br /&gt;
* Opteron 3200 &amp;quot;Zurich&amp;quot;&lt;br /&gt;
==== Socket C32 ====&lt;br /&gt;
* Opteron 4200 &amp;quot;Valencia&amp;quot;&lt;br /&gt;
==== Socket G34 ====&lt;br /&gt;
* Opteron 6200 &amp;quot;Interlagos&amp;quot;&lt;br /&gt;
== AMD 15h Piledriver CPUs ==&lt;br /&gt;
=== OR, Orochi ===&lt;br /&gt;
==== Socket AM3+ ====&lt;br /&gt;
* AMD FX &amp;quot;Vishera&amp;quot;&lt;br /&gt;
* Opteron 3300 &amp;quot;Delhi&amp;quot;&lt;br /&gt;
==== Socket C32 ====&lt;br /&gt;
* Opteron 4300 &amp;quot;Seoul&amp;quot;&lt;br /&gt;
==== Socket G34 ====&lt;br /&gt;
* Opteron 6300 &amp;quot;Abu Dhabi&amp;quot; and &amp;quot;Warsaw&amp;quot;&lt;br /&gt;
=== TN, Trinity ===&lt;br /&gt;
==== Socket FM2 ====&lt;br /&gt;
* A4, A6, A8, A10 5000 Series&lt;br /&gt;
* Sempron X2 240&lt;br /&gt;
* Athlon X2 340&lt;br /&gt;
* Athlon X4 730, 740, 750K&lt;br /&gt;
* FirePro A300, A320&lt;br /&gt;
==== Socket FP2 ====&lt;br /&gt;
* A4, A6, A8, A10 4000 Series (Mobile)&lt;br /&gt;
==== Socket FS1r2 ====&lt;br /&gt;
* A4, A6, A8, A10 4000 Series (Mobile)&lt;br /&gt;
=== RL, Richland ===&lt;br /&gt;
==== Socket FM2 ====&lt;br /&gt;
* A4, A6, A8, A10 6000 Series&lt;br /&gt;
* A4 PRO-7300B&lt;br /&gt;
* Athlon X4 750, 760K&lt;br /&gt;
==== Socket FP2 ====&lt;br /&gt;
* A4, A6, A8, A10 5000 Series (Mobile)&lt;br /&gt;
==== Socket FS1r2 ====&lt;br /&gt;
* A4, A6, A8, A10 5000 Series (Mobile)&lt;br /&gt;
=== KM, Komodo ===&lt;br /&gt;
==== Socket FM2 ====&lt;br /&gt;
* Canceled&lt;br /&gt;
== AMD 15h Steamroller CPUs ==&lt;br /&gt;
=== KV, Kaveri ===&lt;br /&gt;
=== GV, Godavari ===&lt;br /&gt;
&lt;br /&gt;
== AMD 15h Excavator CPUs ==&lt;br /&gt;
=== CZ, Carrizo ===&lt;br /&gt;
=== BR, Bristol Ridge ===&lt;br /&gt;
=== ST, Stoney Ridge ===&lt;br /&gt;
&lt;br /&gt;
== AMD 16h Jaguar CPUs ==&lt;br /&gt;
=== KB, Kabini ===&lt;br /&gt;
==== Socket AM1 ====&lt;br /&gt;
==== Socket FT3 ====&lt;br /&gt;
== AMD 16h Puma CPUs ==&lt;br /&gt;
=== ML, Mullins ===&lt;br /&gt;
==== Socket AM1 ====&lt;br /&gt;
==== Socket FT3b ====&lt;/div&gt;</summary>
		<author><name>Mrothfuss</name></author>
	</entry>
	<entry>
		<id>https://15h.org/index.php?title=AMD_Codenames&amp;diff=2908</id>
		<title>AMD Codenames</title>
		<link rel="alternate" type="text/html" href="https://15h.org/index.php?title=AMD_Codenames&amp;diff=2908"/>
		<updated>2026-05-31T19:53:41Z</updated>

		<summary type="html">&lt;p&gt;Mrothfuss: /* DA, Danube */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;This is an incomplete list of AMD Codenames.&lt;br /&gt;
&lt;br /&gt;
== AMD Platforms ==&lt;br /&gt;
* &#039;&#039;&#039;Tigris&#039;&#039;&#039;, K10 Socket S1g3 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Danube&#039;&#039;&#039;, K10 Socket S1g4 Platforms&lt;br /&gt;
* &#039;&#039;&#039;DanNi&#039;&#039;&#039;, K10 Socket S1g4 and ASB2 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Nile&#039;&#039;&#039;, K10 Socket ASB2 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Dragon&#039;&#039;&#039;, K10 Socket AM3 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Lynx&#039;&#039;&#039;, Llano Socket FM1 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Sabine&#039;&#039;&#039;, Llano Socket FS1 and FP1 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Brazos&#039;&#039;&#039;, Bobcat Socket FT1 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Deccan&#039;&#039;&#039;, Bobcat Socket FT2 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Scorpius&#039;&#039;&#039;, K10/Bulldozer/Piledriver Socket AM3 and AM3+ Platforms&lt;br /&gt;
* &#039;&#039;&#039;SanMarino&#039;&#039;&#039;, K10/Bulldozer/Piledriver Socket C32 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Maranello&#039;&#039;&#039;, K10/Bulldozer/Piledriver Socket G34 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Comal&#039;&#039;&#039;, Trinity Socket FS1 and FP2 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Virgo&#039;&#039;&#039;, Trinity Socket FM2 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Kerala&#039;&#039;&#039;, Kabini Socket FT3 Platforms&lt;br /&gt;
&lt;br /&gt;
== AMD 10h K10 CPUs ==&lt;br /&gt;
* [[K10|Detailed article]]&lt;br /&gt;
&lt;br /&gt;
=== DR, Deerhound ===&lt;br /&gt;
* [[K10 dies 65 nm|article: K10 dies 65 nm]]&lt;br /&gt;
==== Socket AM2+ ====&lt;br /&gt;
* Athlon X2 &amp;quot;Kuma&amp;quot;&lt;br /&gt;
* Phenom X3 &amp;quot;Toliman&amp;quot;&lt;br /&gt;
* Phenom X4 &amp;quot;Agena&amp;quot;&lt;br /&gt;
* Opteron 1300 &amp;quot;Budapest&amp;quot;&lt;br /&gt;
==== Socket Fr2 ====&lt;br /&gt;
* Opteron 2300/8300 &amp;quot;Barcelona&amp;quot;&lt;br /&gt;
&lt;br /&gt;
=== RB, Ridgeback ===&lt;br /&gt;
* [[K10 dies 45 nm|article: K10 dies 45 nm]]&lt;br /&gt;
==== Socket AM2+ ====&lt;br /&gt;
* Athlon X2&lt;br /&gt;
* Phenom II X3/X4&lt;br /&gt;
==== Socket AM3 ====&lt;br /&gt;
* Phenom II XLT (embedded)&lt;br /&gt;
* Phenom II X2/X3/X4&lt;br /&gt;
* Opteron 1300 &amp;quot;Suzuka&amp;quot;&lt;br /&gt;
==== Socket Fr2/Fr5 ====&lt;br /&gt;
* Opteron 2300/8300 &amp;quot;Shanghai&amp;quot;&lt;br /&gt;
&lt;br /&gt;
=== BL, Bloodhound ===&lt;br /&gt;
* [[K10 dies 45 nm|article: K10 dies 45 nm]]&lt;br /&gt;
==== Socket AM3 ====&lt;br /&gt;
* Athlon II X2/X3/X4&lt;br /&gt;
&lt;br /&gt;
=== DA, Dachshund ===&lt;br /&gt;
* [[K10 dies 45 nm|article: K10 dies 45 nm]]&lt;br /&gt;
==== Socket ASB2 ====&lt;br /&gt;
* V-Series &lt;br /&gt;
* Athlon II Neo N/K/R&lt;br /&gt;
* Turion II Neo N/K &amp;quot;Geneva&amp;quot;&lt;br /&gt;
==== Socket S1g3/S1g4 ====&lt;br /&gt;
* Turion II M500 &lt;br /&gt;
* Turion II Ultra M600 &amp;quot;Caspian&amp;quot;&lt;br /&gt;
* V-Series&lt;br /&gt;
* Sempron M100&lt;br /&gt;
* Athlon II M300&lt;br /&gt;
* Phenom II N/P/X&lt;br /&gt;
==== Socket AM3 ====&lt;br /&gt;
* Sempron&lt;br /&gt;
* Sempron X2&lt;br /&gt;
* Athlon II XL &amp;amp; XLT (embedded)&lt;br /&gt;
* Athlon II&lt;br /&gt;
* Athlon II X2&lt;br /&gt;
&lt;br /&gt;
=== HY, Hydra ===&lt;br /&gt;
* [[K10 dies 45 nm|article: K10 dies 45 nm]]&lt;br /&gt;
==== Socket Fr6 ====&lt;br /&gt;
* Opteron 2400/8400 &amp;quot;Istanbul&amp;quot;&lt;br /&gt;
==== Socket C32 ====&lt;br /&gt;
* Opteron 4100 &amp;quot;Lisbon&amp;quot;&lt;br /&gt;
==== Socket G34 ====&lt;br /&gt;
* Opteron 6100 &amp;quot;Magny Cours&amp;quot;&lt;br /&gt;
=== PH, Pharaoh Hound ===&lt;br /&gt;
* [[K10 dies 45 nm|article: K10 dies 45 nm]]&lt;br /&gt;
==== Socket AM3 ====&lt;br /&gt;
* Athlon II X4&lt;br /&gt;
* Phenom II X4 &amp;quot;Zosma&amp;quot;&lt;br /&gt;
* Phenom II X6 &amp;quot;Thuban&amp;quot;&lt;br /&gt;
== AMD 12h K10 CPUs ==&lt;br /&gt;
[[K10 dies 32 nm|detailed article (TO DO)]]&lt;br /&gt;
=== LN, Llano ===&lt;br /&gt;
==== Socket FM1 ====&lt;br /&gt;
* A4, A6, A8 3000 Series&lt;br /&gt;
* Athlon II X4 600 Series&lt;br /&gt;
* E2-3200&lt;br /&gt;
==== Socket FS1 ====&lt;br /&gt;
* A4, A6, A8 3000 Series (Mobile)&lt;br /&gt;
* E2-3000M&lt;br /&gt;
== AMD 14h Bobcat CPUs ==&lt;br /&gt;
=== ON, Ontario ===&lt;br /&gt;
==== Socket FT1 ====&lt;br /&gt;
* C-30, C-50, C-60, C-70&lt;br /&gt;
=== ??, Zacate ===&lt;br /&gt;
=== ??, Desna ===&lt;br /&gt;
== AMD 15h Bulldozer CPUs ==&lt;br /&gt;
=== OR, Orochi ===&lt;br /&gt;
==== Socket AM3+ ====&lt;br /&gt;
* AMD FX &amp;quot;Zambezi&amp;quot;&lt;br /&gt;
* Opteron 3200 &amp;quot;Zurich&amp;quot;&lt;br /&gt;
==== Socket C32 ====&lt;br /&gt;
* Opteron 4200 &amp;quot;Valencia&amp;quot;&lt;br /&gt;
==== Socket G34 ====&lt;br /&gt;
* Opteron 6200 &amp;quot;Interlagos&amp;quot;&lt;br /&gt;
== AMD 15h Piledriver CPUs ==&lt;br /&gt;
=== OR, Orochi ===&lt;br /&gt;
==== Socket AM3+ ====&lt;br /&gt;
* AMD FX &amp;quot;Vishera&amp;quot;&lt;br /&gt;
* Opteron 3300 &amp;quot;Delhi&amp;quot;&lt;br /&gt;
==== Socket C32 ====&lt;br /&gt;
* Opteron 4300 &amp;quot;Seoul&amp;quot;&lt;br /&gt;
==== Socket G34 ====&lt;br /&gt;
* Opteron 6300 &amp;quot;Abu Dhabi&amp;quot; and &amp;quot;Warsaw&amp;quot;&lt;br /&gt;
=== TN, Trinity ===&lt;br /&gt;
==== Socket FM2 ====&lt;br /&gt;
* A4, A6, A8, A10 5000 Series&lt;br /&gt;
* Sempron X2 240&lt;br /&gt;
* Athlon X2 340&lt;br /&gt;
* Athlon X4 730, 740, 750K&lt;br /&gt;
* FirePro A300, A320&lt;br /&gt;
==== Socket FP2 ====&lt;br /&gt;
* A4, A6, A8, A10 4000 Series (Mobile)&lt;br /&gt;
==== Socket FS1r2 ====&lt;br /&gt;
* A4, A6, A8, A10 4000 Series (Mobile)&lt;br /&gt;
=== RL, Richland ===&lt;br /&gt;
==== Socket FM2 ====&lt;br /&gt;
* A4, A6, A8, A10 6000 Series&lt;br /&gt;
* A4 PRO-7300B&lt;br /&gt;
* Athlon X4 750, 760K&lt;br /&gt;
==== Socket FP2 ====&lt;br /&gt;
* A4, A6, A8, A10 5000 Series (Mobile)&lt;br /&gt;
==== Socket FS1r2 ====&lt;br /&gt;
* A4, A6, A8, A10 5000 Series (Mobile)&lt;br /&gt;
=== KM, Komodo ===&lt;br /&gt;
==== Socket FM2 ====&lt;br /&gt;
* Canceled&lt;br /&gt;
== AMD 15h Steamroller CPUs ==&lt;br /&gt;
=== KV, Kaveri ===&lt;br /&gt;
=== GV, Godavari ===&lt;br /&gt;
&lt;br /&gt;
== AMD 15h Excavator CPUs ==&lt;br /&gt;
=== CZ, Carrizo ===&lt;br /&gt;
=== BR, Bristol Ridge ===&lt;br /&gt;
=== ST, Stoney Ridge ===&lt;br /&gt;
&lt;br /&gt;
== AMD 16h Jaguar CPUs ==&lt;br /&gt;
=== KB, Kabini ===&lt;br /&gt;
==== Socket AM1 ====&lt;br /&gt;
==== Socket FT3 ====&lt;br /&gt;
== AMD 16h Puma CPUs ==&lt;br /&gt;
=== ML, Mullins ===&lt;br /&gt;
==== Socket AM1 ====&lt;br /&gt;
==== Socket FT3b ====&lt;/div&gt;</summary>
		<author><name>Mrothfuss</name></author>
	</entry>
	<entry>
		<id>https://15h.org/index.php?title=AMD_Codenames&amp;diff=2907</id>
		<title>AMD Codenames</title>
		<link rel="alternate" type="text/html" href="https://15h.org/index.php?title=AMD_Codenames&amp;diff=2907"/>
		<updated>2026-05-31T19:53:17Z</updated>

		<summary type="html">&lt;p&gt;Mrothfuss: /* BL */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;This is an incomplete list of AMD Codenames.&lt;br /&gt;
&lt;br /&gt;
== AMD Platforms ==&lt;br /&gt;
* &#039;&#039;&#039;Tigris&#039;&#039;&#039;, K10 Socket S1g3 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Danube&#039;&#039;&#039;, K10 Socket S1g4 Platforms&lt;br /&gt;
* &#039;&#039;&#039;DanNi&#039;&#039;&#039;, K10 Socket S1g4 and ASB2 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Nile&#039;&#039;&#039;, K10 Socket ASB2 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Dragon&#039;&#039;&#039;, K10 Socket AM3 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Lynx&#039;&#039;&#039;, Llano Socket FM1 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Sabine&#039;&#039;&#039;, Llano Socket FS1 and FP1 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Brazos&#039;&#039;&#039;, Bobcat Socket FT1 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Deccan&#039;&#039;&#039;, Bobcat Socket FT2 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Scorpius&#039;&#039;&#039;, K10/Bulldozer/Piledriver Socket AM3 and AM3+ Platforms&lt;br /&gt;
* &#039;&#039;&#039;SanMarino&#039;&#039;&#039;, K10/Bulldozer/Piledriver Socket C32 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Maranello&#039;&#039;&#039;, K10/Bulldozer/Piledriver Socket G34 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Comal&#039;&#039;&#039;, Trinity Socket FS1 and FP2 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Virgo&#039;&#039;&#039;, Trinity Socket FM2 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Kerala&#039;&#039;&#039;, Kabini Socket FT3 Platforms&lt;br /&gt;
&lt;br /&gt;
== AMD 10h K10 CPUs ==&lt;br /&gt;
* [[K10|Detailed article]]&lt;br /&gt;
&lt;br /&gt;
=== DR, Deerhound ===&lt;br /&gt;
* [[K10 dies 65 nm|article: K10 dies 65 nm]]&lt;br /&gt;
==== Socket AM2+ ====&lt;br /&gt;
* Athlon X2 &amp;quot;Kuma&amp;quot;&lt;br /&gt;
* Phenom X3 &amp;quot;Toliman&amp;quot;&lt;br /&gt;
* Phenom X4 &amp;quot;Agena&amp;quot;&lt;br /&gt;
* Opteron 1300 &amp;quot;Budapest&amp;quot;&lt;br /&gt;
==== Socket Fr2 ====&lt;br /&gt;
* Opteron 2300/8300 &amp;quot;Barcelona&amp;quot;&lt;br /&gt;
&lt;br /&gt;
=== RB, Ridgeback ===&lt;br /&gt;
* [[K10 dies 45 nm|article: K10 dies 45 nm]]&lt;br /&gt;
==== Socket AM2+ ====&lt;br /&gt;
* Athlon X2&lt;br /&gt;
* Phenom II X3/X4&lt;br /&gt;
==== Socket AM3 ====&lt;br /&gt;
* Phenom II XLT (embedded)&lt;br /&gt;
* Phenom II X2/X3/X4&lt;br /&gt;
* Opteron 1300 &amp;quot;Suzuka&amp;quot;&lt;br /&gt;
==== Socket Fr2/Fr5 ====&lt;br /&gt;
* Opteron 2300/8300 &amp;quot;Shanghai&amp;quot;&lt;br /&gt;
&lt;br /&gt;
=== BL, Bloodhound ===&lt;br /&gt;
* [[K10 dies 45 nm|article: K10 dies 45 nm]]&lt;br /&gt;
==== Socket AM3 ====&lt;br /&gt;
* Athlon II X2/X3/X4&lt;br /&gt;
&lt;br /&gt;
=== DA, Danube ===&lt;br /&gt;
* [[K10 dies 45 nm|article: K10 dies 45 nm]]&lt;br /&gt;
==== Socket ASB2 ====&lt;br /&gt;
* V-Series &lt;br /&gt;
* Athlon II Neo N/K/R&lt;br /&gt;
* Turion II Neo N/K &amp;quot;Geneva&amp;quot;&lt;br /&gt;
==== Socket S1g3/S1g4 ====&lt;br /&gt;
* Turion II M500 &lt;br /&gt;
* Turion II Ultra M600 &amp;quot;Caspian&amp;quot;&lt;br /&gt;
* V-Series&lt;br /&gt;
* Sempron M100&lt;br /&gt;
* Athlon II M300&lt;br /&gt;
* Phenom II N/P/X&lt;br /&gt;
==== Socket AM3 ====&lt;br /&gt;
* Sempron&lt;br /&gt;
* Sempron X2&lt;br /&gt;
* Athlon II XL &amp;amp; XLT (embedded)&lt;br /&gt;
* Athlon II&lt;br /&gt;
* Athlon II X2&lt;br /&gt;
=== HY, Hydra ===&lt;br /&gt;
* [[K10 dies 45 nm|article: K10 dies 45 nm]]&lt;br /&gt;
==== Socket Fr6 ====&lt;br /&gt;
* Opteron 2400/8400 &amp;quot;Istanbul&amp;quot;&lt;br /&gt;
==== Socket C32 ====&lt;br /&gt;
* Opteron 4100 &amp;quot;Lisbon&amp;quot;&lt;br /&gt;
==== Socket G34 ====&lt;br /&gt;
* Opteron 6100 &amp;quot;Magny Cours&amp;quot;&lt;br /&gt;
=== PH, Pharaoh Hound ===&lt;br /&gt;
* [[K10 dies 45 nm|article: K10 dies 45 nm]]&lt;br /&gt;
==== Socket AM3 ====&lt;br /&gt;
* Athlon II X4&lt;br /&gt;
* Phenom II X4 &amp;quot;Zosma&amp;quot;&lt;br /&gt;
* Phenom II X6 &amp;quot;Thuban&amp;quot;&lt;br /&gt;
== AMD 12h K10 CPUs ==&lt;br /&gt;
[[K10 dies 32 nm|detailed article (TO DO)]]&lt;br /&gt;
=== LN, Llano ===&lt;br /&gt;
==== Socket FM1 ====&lt;br /&gt;
* A4, A6, A8 3000 Series&lt;br /&gt;
* Athlon II X4 600 Series&lt;br /&gt;
* E2-3200&lt;br /&gt;
==== Socket FS1 ====&lt;br /&gt;
* A4, A6, A8 3000 Series (Mobile)&lt;br /&gt;
* E2-3000M&lt;br /&gt;
== AMD 14h Bobcat CPUs ==&lt;br /&gt;
=== ON, Ontario ===&lt;br /&gt;
==== Socket FT1 ====&lt;br /&gt;
* C-30, C-50, C-60, C-70&lt;br /&gt;
=== ??, Zacate ===&lt;br /&gt;
=== ??, Desna ===&lt;br /&gt;
== AMD 15h Bulldozer CPUs ==&lt;br /&gt;
=== OR, Orochi ===&lt;br /&gt;
==== Socket AM3+ ====&lt;br /&gt;
* AMD FX &amp;quot;Zambezi&amp;quot;&lt;br /&gt;
* Opteron 3200 &amp;quot;Zurich&amp;quot;&lt;br /&gt;
==== Socket C32 ====&lt;br /&gt;
* Opteron 4200 &amp;quot;Valencia&amp;quot;&lt;br /&gt;
==== Socket G34 ====&lt;br /&gt;
* Opteron 6200 &amp;quot;Interlagos&amp;quot;&lt;br /&gt;
== AMD 15h Piledriver CPUs ==&lt;br /&gt;
=== OR, Orochi ===&lt;br /&gt;
==== Socket AM3+ ====&lt;br /&gt;
* AMD FX &amp;quot;Vishera&amp;quot;&lt;br /&gt;
* Opteron 3300 &amp;quot;Delhi&amp;quot;&lt;br /&gt;
==== Socket C32 ====&lt;br /&gt;
* Opteron 4300 &amp;quot;Seoul&amp;quot;&lt;br /&gt;
==== Socket G34 ====&lt;br /&gt;
* Opteron 6300 &amp;quot;Abu Dhabi&amp;quot; and &amp;quot;Warsaw&amp;quot;&lt;br /&gt;
=== TN, Trinity ===&lt;br /&gt;
==== Socket FM2 ====&lt;br /&gt;
* A4, A6, A8, A10 5000 Series&lt;br /&gt;
* Sempron X2 240&lt;br /&gt;
* Athlon X2 340&lt;br /&gt;
* Athlon X4 730, 740, 750K&lt;br /&gt;
* FirePro A300, A320&lt;br /&gt;
==== Socket FP2 ====&lt;br /&gt;
* A4, A6, A8, A10 4000 Series (Mobile)&lt;br /&gt;
==== Socket FS1r2 ====&lt;br /&gt;
* A4, A6, A8, A10 4000 Series (Mobile)&lt;br /&gt;
=== RL, Richland ===&lt;br /&gt;
==== Socket FM2 ====&lt;br /&gt;
* A4, A6, A8, A10 6000 Series&lt;br /&gt;
* A4 PRO-7300B&lt;br /&gt;
* Athlon X4 750, 760K&lt;br /&gt;
==== Socket FP2 ====&lt;br /&gt;
* A4, A6, A8, A10 5000 Series (Mobile)&lt;br /&gt;
==== Socket FS1r2 ====&lt;br /&gt;
* A4, A6, A8, A10 5000 Series (Mobile)&lt;br /&gt;
=== KM, Komodo ===&lt;br /&gt;
==== Socket FM2 ====&lt;br /&gt;
* Canceled&lt;br /&gt;
== AMD 15h Steamroller CPUs ==&lt;br /&gt;
=== KV, Kaveri ===&lt;br /&gt;
=== GV, Godavari ===&lt;br /&gt;
&lt;br /&gt;
== AMD 15h Excavator CPUs ==&lt;br /&gt;
=== CZ, Carrizo ===&lt;br /&gt;
=== BR, Bristol Ridge ===&lt;br /&gt;
=== ST, Stoney Ridge ===&lt;br /&gt;
&lt;br /&gt;
== AMD 16h Jaguar CPUs ==&lt;br /&gt;
=== KB, Kabini ===&lt;br /&gt;
==== Socket AM1 ====&lt;br /&gt;
==== Socket FT3 ====&lt;br /&gt;
== AMD 16h Puma CPUs ==&lt;br /&gt;
=== ML, Mullins ===&lt;br /&gt;
==== Socket AM1 ====&lt;br /&gt;
==== Socket FT3b ====&lt;/div&gt;</summary>
		<author><name>Mrothfuss</name></author>
	</entry>
	<entry>
		<id>https://15h.org/index.php?title=AMD_Codenames&amp;diff=2906</id>
		<title>AMD Codenames</title>
		<link rel="alternate" type="text/html" href="https://15h.org/index.php?title=AMD_Codenames&amp;diff=2906"/>
		<updated>2026-05-31T19:53:08Z</updated>

		<summary type="html">&lt;p&gt;Mrothfuss: /* RB, RidgeBack */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;This is an incomplete list of AMD Codenames.&lt;br /&gt;
&lt;br /&gt;
== AMD Platforms ==&lt;br /&gt;
* &#039;&#039;&#039;Tigris&#039;&#039;&#039;, K10 Socket S1g3 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Danube&#039;&#039;&#039;, K10 Socket S1g4 Platforms&lt;br /&gt;
* &#039;&#039;&#039;DanNi&#039;&#039;&#039;, K10 Socket S1g4 and ASB2 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Nile&#039;&#039;&#039;, K10 Socket ASB2 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Dragon&#039;&#039;&#039;, K10 Socket AM3 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Lynx&#039;&#039;&#039;, Llano Socket FM1 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Sabine&#039;&#039;&#039;, Llano Socket FS1 and FP1 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Brazos&#039;&#039;&#039;, Bobcat Socket FT1 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Deccan&#039;&#039;&#039;, Bobcat Socket FT2 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Scorpius&#039;&#039;&#039;, K10/Bulldozer/Piledriver Socket AM3 and AM3+ Platforms&lt;br /&gt;
* &#039;&#039;&#039;SanMarino&#039;&#039;&#039;, K10/Bulldozer/Piledriver Socket C32 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Maranello&#039;&#039;&#039;, K10/Bulldozer/Piledriver Socket G34 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Comal&#039;&#039;&#039;, Trinity Socket FS1 and FP2 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Virgo&#039;&#039;&#039;, Trinity Socket FM2 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Kerala&#039;&#039;&#039;, Kabini Socket FT3 Platforms&lt;br /&gt;
&lt;br /&gt;
== AMD 10h K10 CPUs ==&lt;br /&gt;
* [[K10|Detailed article]]&lt;br /&gt;
&lt;br /&gt;
=== DR, Deerhound ===&lt;br /&gt;
* [[K10 dies 65 nm|article: K10 dies 65 nm]]&lt;br /&gt;
==== Socket AM2+ ====&lt;br /&gt;
* Athlon X2 &amp;quot;Kuma&amp;quot;&lt;br /&gt;
* Phenom X3 &amp;quot;Toliman&amp;quot;&lt;br /&gt;
* Phenom X4 &amp;quot;Agena&amp;quot;&lt;br /&gt;
* Opteron 1300 &amp;quot;Budapest&amp;quot;&lt;br /&gt;
==== Socket Fr2 ====&lt;br /&gt;
* Opteron 2300/8300 &amp;quot;Barcelona&amp;quot;&lt;br /&gt;
&lt;br /&gt;
=== RB, Ridgeback ===&lt;br /&gt;
* [[K10 dies 45 nm|article: K10 dies 45 nm]]&lt;br /&gt;
==== Socket AM2+ ====&lt;br /&gt;
* Athlon X2&lt;br /&gt;
* Phenom II X3/X4&lt;br /&gt;
==== Socket AM3 ====&lt;br /&gt;
* Phenom II XLT (embedded)&lt;br /&gt;
* Phenom II X2/X3/X4&lt;br /&gt;
* Opteron 1300 &amp;quot;Suzuka&amp;quot;&lt;br /&gt;
==== Socket Fr2/Fr5 ====&lt;br /&gt;
* Opteron 2300/8300 &amp;quot;Shanghai&amp;quot;&lt;br /&gt;
&lt;br /&gt;
=== BL ===&lt;br /&gt;
* [[K10 dies 45 nm|article: K10 dies 45 nm]]&lt;br /&gt;
==== Socket AM3 ====&lt;br /&gt;
* Athlon II X2/X3/X4&lt;br /&gt;
=== DA, Danube ===&lt;br /&gt;
* [[K10 dies 45 nm|article: K10 dies 45 nm]]&lt;br /&gt;
==== Socket ASB2 ====&lt;br /&gt;
* V-Series &lt;br /&gt;
* Athlon II Neo N/K/R&lt;br /&gt;
* Turion II Neo N/K &amp;quot;Geneva&amp;quot;&lt;br /&gt;
==== Socket S1g3/S1g4 ====&lt;br /&gt;
* Turion II M500 &lt;br /&gt;
* Turion II Ultra M600 &amp;quot;Caspian&amp;quot;&lt;br /&gt;
* V-Series&lt;br /&gt;
* Sempron M100&lt;br /&gt;
* Athlon II M300&lt;br /&gt;
* Phenom II N/P/X&lt;br /&gt;
==== Socket AM3 ====&lt;br /&gt;
* Sempron&lt;br /&gt;
* Sempron X2&lt;br /&gt;
* Athlon II XL &amp;amp; XLT (embedded)&lt;br /&gt;
* Athlon II&lt;br /&gt;
* Athlon II X2&lt;br /&gt;
=== HY, Hydra ===&lt;br /&gt;
* [[K10 dies 45 nm|article: K10 dies 45 nm]]&lt;br /&gt;
==== Socket Fr6 ====&lt;br /&gt;
* Opteron 2400/8400 &amp;quot;Istanbul&amp;quot;&lt;br /&gt;
==== Socket C32 ====&lt;br /&gt;
* Opteron 4100 &amp;quot;Lisbon&amp;quot;&lt;br /&gt;
==== Socket G34 ====&lt;br /&gt;
* Opteron 6100 &amp;quot;Magny Cours&amp;quot;&lt;br /&gt;
=== PH, Pharaoh Hound ===&lt;br /&gt;
* [[K10 dies 45 nm|article: K10 dies 45 nm]]&lt;br /&gt;
==== Socket AM3 ====&lt;br /&gt;
* Athlon II X4&lt;br /&gt;
* Phenom II X4 &amp;quot;Zosma&amp;quot;&lt;br /&gt;
* Phenom II X6 &amp;quot;Thuban&amp;quot;&lt;br /&gt;
== AMD 12h K10 CPUs ==&lt;br /&gt;
[[K10 dies 32 nm|detailed article (TO DO)]]&lt;br /&gt;
=== LN, Llano ===&lt;br /&gt;
==== Socket FM1 ====&lt;br /&gt;
* A4, A6, A8 3000 Series&lt;br /&gt;
* Athlon II X4 600 Series&lt;br /&gt;
* E2-3200&lt;br /&gt;
==== Socket FS1 ====&lt;br /&gt;
* A4, A6, A8 3000 Series (Mobile)&lt;br /&gt;
* E2-3000M&lt;br /&gt;
== AMD 14h Bobcat CPUs ==&lt;br /&gt;
=== ON, Ontario ===&lt;br /&gt;
==== Socket FT1 ====&lt;br /&gt;
* C-30, C-50, C-60, C-70&lt;br /&gt;
=== ??, Zacate ===&lt;br /&gt;
=== ??, Desna ===&lt;br /&gt;
== AMD 15h Bulldozer CPUs ==&lt;br /&gt;
=== OR, Orochi ===&lt;br /&gt;
==== Socket AM3+ ====&lt;br /&gt;
* AMD FX &amp;quot;Zambezi&amp;quot;&lt;br /&gt;
* Opteron 3200 &amp;quot;Zurich&amp;quot;&lt;br /&gt;
==== Socket C32 ====&lt;br /&gt;
* Opteron 4200 &amp;quot;Valencia&amp;quot;&lt;br /&gt;
==== Socket G34 ====&lt;br /&gt;
* Opteron 6200 &amp;quot;Interlagos&amp;quot;&lt;br /&gt;
== AMD 15h Piledriver CPUs ==&lt;br /&gt;
=== OR, Orochi ===&lt;br /&gt;
==== Socket AM3+ ====&lt;br /&gt;
* AMD FX &amp;quot;Vishera&amp;quot;&lt;br /&gt;
* Opteron 3300 &amp;quot;Delhi&amp;quot;&lt;br /&gt;
==== Socket C32 ====&lt;br /&gt;
* Opteron 4300 &amp;quot;Seoul&amp;quot;&lt;br /&gt;
==== Socket G34 ====&lt;br /&gt;
* Opteron 6300 &amp;quot;Abu Dhabi&amp;quot; and &amp;quot;Warsaw&amp;quot;&lt;br /&gt;
=== TN, Trinity ===&lt;br /&gt;
==== Socket FM2 ====&lt;br /&gt;
* A4, A6, A8, A10 5000 Series&lt;br /&gt;
* Sempron X2 240&lt;br /&gt;
* Athlon X2 340&lt;br /&gt;
* Athlon X4 730, 740, 750K&lt;br /&gt;
* FirePro A300, A320&lt;br /&gt;
==== Socket FP2 ====&lt;br /&gt;
* A4, A6, A8, A10 4000 Series (Mobile)&lt;br /&gt;
==== Socket FS1r2 ====&lt;br /&gt;
* A4, A6, A8, A10 4000 Series (Mobile)&lt;br /&gt;
=== RL, Richland ===&lt;br /&gt;
==== Socket FM2 ====&lt;br /&gt;
* A4, A6, A8, A10 6000 Series&lt;br /&gt;
* A4 PRO-7300B&lt;br /&gt;
* Athlon X4 750, 760K&lt;br /&gt;
==== Socket FP2 ====&lt;br /&gt;
* A4, A6, A8, A10 5000 Series (Mobile)&lt;br /&gt;
==== Socket FS1r2 ====&lt;br /&gt;
* A4, A6, A8, A10 5000 Series (Mobile)&lt;br /&gt;
=== KM, Komodo ===&lt;br /&gt;
==== Socket FM2 ====&lt;br /&gt;
* Canceled&lt;br /&gt;
== AMD 15h Steamroller CPUs ==&lt;br /&gt;
=== KV, Kaveri ===&lt;br /&gt;
=== GV, Godavari ===&lt;br /&gt;
&lt;br /&gt;
== AMD 15h Excavator CPUs ==&lt;br /&gt;
=== CZ, Carrizo ===&lt;br /&gt;
=== BR, Bristol Ridge ===&lt;br /&gt;
=== ST, Stoney Ridge ===&lt;br /&gt;
&lt;br /&gt;
== AMD 16h Jaguar CPUs ==&lt;br /&gt;
=== KB, Kabini ===&lt;br /&gt;
==== Socket AM1 ====&lt;br /&gt;
==== Socket FT3 ====&lt;br /&gt;
== AMD 16h Puma CPUs ==&lt;br /&gt;
=== ML, Mullins ===&lt;br /&gt;
==== Socket AM1 ====&lt;br /&gt;
==== Socket FT3b ====&lt;/div&gt;</summary>
		<author><name>Mrothfuss</name></author>
	</entry>
	<entry>
		<id>https://15h.org/index.php?title=AMD_Codenames&amp;diff=2905</id>
		<title>AMD Codenames</title>
		<link rel="alternate" type="text/html" href="https://15h.org/index.php?title=AMD_Codenames&amp;diff=2905"/>
		<updated>2026-05-31T19:53:02Z</updated>

		<summary type="html">&lt;p&gt;Mrothfuss: /* DR, DeerHound */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;This is an incomplete list of AMD Codenames.&lt;br /&gt;
&lt;br /&gt;
== AMD Platforms ==&lt;br /&gt;
* &#039;&#039;&#039;Tigris&#039;&#039;&#039;, K10 Socket S1g3 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Danube&#039;&#039;&#039;, K10 Socket S1g4 Platforms&lt;br /&gt;
* &#039;&#039;&#039;DanNi&#039;&#039;&#039;, K10 Socket S1g4 and ASB2 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Nile&#039;&#039;&#039;, K10 Socket ASB2 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Dragon&#039;&#039;&#039;, K10 Socket AM3 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Lynx&#039;&#039;&#039;, Llano Socket FM1 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Sabine&#039;&#039;&#039;, Llano Socket FS1 and FP1 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Brazos&#039;&#039;&#039;, Bobcat Socket FT1 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Deccan&#039;&#039;&#039;, Bobcat Socket FT2 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Scorpius&#039;&#039;&#039;, K10/Bulldozer/Piledriver Socket AM3 and AM3+ Platforms&lt;br /&gt;
* &#039;&#039;&#039;SanMarino&#039;&#039;&#039;, K10/Bulldozer/Piledriver Socket C32 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Maranello&#039;&#039;&#039;, K10/Bulldozer/Piledriver Socket G34 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Comal&#039;&#039;&#039;, Trinity Socket FS1 and FP2 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Virgo&#039;&#039;&#039;, Trinity Socket FM2 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Kerala&#039;&#039;&#039;, Kabini Socket FT3 Platforms&lt;br /&gt;
&lt;br /&gt;
== AMD 10h K10 CPUs ==&lt;br /&gt;
* [[K10|Detailed article]]&lt;br /&gt;
&lt;br /&gt;
=== DR, Deerhound ===&lt;br /&gt;
* [[K10 dies 65 nm|article: K10 dies 65 nm]]&lt;br /&gt;
==== Socket AM2+ ====&lt;br /&gt;
* Athlon X2 &amp;quot;Kuma&amp;quot;&lt;br /&gt;
* Phenom X3 &amp;quot;Toliman&amp;quot;&lt;br /&gt;
* Phenom X4 &amp;quot;Agena&amp;quot;&lt;br /&gt;
* Opteron 1300 &amp;quot;Budapest&amp;quot;&lt;br /&gt;
==== Socket Fr2 ====&lt;br /&gt;
* Opteron 2300/8300 &amp;quot;Barcelona&amp;quot;&lt;br /&gt;
&lt;br /&gt;
=== RB, RidgeBack ===&lt;br /&gt;
* [[K10 dies 45 nm|article: K10 dies 45 nm]]&lt;br /&gt;
==== Socket AM2+ ====&lt;br /&gt;
* Athlon X2&lt;br /&gt;
* Phenom II X3/X4&lt;br /&gt;
==== Socket AM3 ====&lt;br /&gt;
* Phenom II XLT (embedded)&lt;br /&gt;
* Phenom II X2/X3/X4&lt;br /&gt;
* Opteron 1300 &amp;quot;Suzuka&amp;quot;&lt;br /&gt;
==== Socket Fr2/Fr5 ====&lt;br /&gt;
* Opteron 2300/8300 &amp;quot;Shanghai&amp;quot; &lt;br /&gt;
=== BL ===&lt;br /&gt;
* [[K10 dies 45 nm|article: K10 dies 45 nm]]&lt;br /&gt;
==== Socket AM3 ====&lt;br /&gt;
* Athlon II X2/X3/X4&lt;br /&gt;
=== DA, Danube ===&lt;br /&gt;
* [[K10 dies 45 nm|article: K10 dies 45 nm]]&lt;br /&gt;
==== Socket ASB2 ====&lt;br /&gt;
* V-Series &lt;br /&gt;
* Athlon II Neo N/K/R&lt;br /&gt;
* Turion II Neo N/K &amp;quot;Geneva&amp;quot;&lt;br /&gt;
==== Socket S1g3/S1g4 ====&lt;br /&gt;
* Turion II M500 &lt;br /&gt;
* Turion II Ultra M600 &amp;quot;Caspian&amp;quot;&lt;br /&gt;
* V-Series&lt;br /&gt;
* Sempron M100&lt;br /&gt;
* Athlon II M300&lt;br /&gt;
* Phenom II N/P/X&lt;br /&gt;
==== Socket AM3 ====&lt;br /&gt;
* Sempron&lt;br /&gt;
* Sempron X2&lt;br /&gt;
* Athlon II XL &amp;amp; XLT (embedded)&lt;br /&gt;
* Athlon II&lt;br /&gt;
* Athlon II X2&lt;br /&gt;
=== HY, Hydra ===&lt;br /&gt;
* [[K10 dies 45 nm|article: K10 dies 45 nm]]&lt;br /&gt;
==== Socket Fr6 ====&lt;br /&gt;
* Opteron 2400/8400 &amp;quot;Istanbul&amp;quot;&lt;br /&gt;
==== Socket C32 ====&lt;br /&gt;
* Opteron 4100 &amp;quot;Lisbon&amp;quot;&lt;br /&gt;
==== Socket G34 ====&lt;br /&gt;
* Opteron 6100 &amp;quot;Magny Cours&amp;quot;&lt;br /&gt;
=== PH, Pharaoh Hound ===&lt;br /&gt;
* [[K10 dies 45 nm|article: K10 dies 45 nm]]&lt;br /&gt;
==== Socket AM3 ====&lt;br /&gt;
* Athlon II X4&lt;br /&gt;
* Phenom II X4 &amp;quot;Zosma&amp;quot;&lt;br /&gt;
* Phenom II X6 &amp;quot;Thuban&amp;quot;&lt;br /&gt;
== AMD 12h K10 CPUs ==&lt;br /&gt;
[[K10 dies 32 nm|detailed article (TO DO)]]&lt;br /&gt;
=== LN, Llano ===&lt;br /&gt;
==== Socket FM1 ====&lt;br /&gt;
* A4, A6, A8 3000 Series&lt;br /&gt;
* Athlon II X4 600 Series&lt;br /&gt;
* E2-3200&lt;br /&gt;
==== Socket FS1 ====&lt;br /&gt;
* A4, A6, A8 3000 Series (Mobile)&lt;br /&gt;
* E2-3000M&lt;br /&gt;
== AMD 14h Bobcat CPUs ==&lt;br /&gt;
=== ON, Ontario ===&lt;br /&gt;
==== Socket FT1 ====&lt;br /&gt;
* C-30, C-50, C-60, C-70&lt;br /&gt;
=== ??, Zacate ===&lt;br /&gt;
=== ??, Desna ===&lt;br /&gt;
== AMD 15h Bulldozer CPUs ==&lt;br /&gt;
=== OR, Orochi ===&lt;br /&gt;
==== Socket AM3+ ====&lt;br /&gt;
* AMD FX &amp;quot;Zambezi&amp;quot;&lt;br /&gt;
* Opteron 3200 &amp;quot;Zurich&amp;quot;&lt;br /&gt;
==== Socket C32 ====&lt;br /&gt;
* Opteron 4200 &amp;quot;Valencia&amp;quot;&lt;br /&gt;
==== Socket G34 ====&lt;br /&gt;
* Opteron 6200 &amp;quot;Interlagos&amp;quot;&lt;br /&gt;
== AMD 15h Piledriver CPUs ==&lt;br /&gt;
=== OR, Orochi ===&lt;br /&gt;
==== Socket AM3+ ====&lt;br /&gt;
* AMD FX &amp;quot;Vishera&amp;quot;&lt;br /&gt;
* Opteron 3300 &amp;quot;Delhi&amp;quot;&lt;br /&gt;
==== Socket C32 ====&lt;br /&gt;
* Opteron 4300 &amp;quot;Seoul&amp;quot;&lt;br /&gt;
==== Socket G34 ====&lt;br /&gt;
* Opteron 6300 &amp;quot;Abu Dhabi&amp;quot; and &amp;quot;Warsaw&amp;quot;&lt;br /&gt;
=== TN, Trinity ===&lt;br /&gt;
==== Socket FM2 ====&lt;br /&gt;
* A4, A6, A8, A10 5000 Series&lt;br /&gt;
* Sempron X2 240&lt;br /&gt;
* Athlon X2 340&lt;br /&gt;
* Athlon X4 730, 740, 750K&lt;br /&gt;
* FirePro A300, A320&lt;br /&gt;
==== Socket FP2 ====&lt;br /&gt;
* A4, A6, A8, A10 4000 Series (Mobile)&lt;br /&gt;
==== Socket FS1r2 ====&lt;br /&gt;
* A4, A6, A8, A10 4000 Series (Mobile)&lt;br /&gt;
=== RL, Richland ===&lt;br /&gt;
==== Socket FM2 ====&lt;br /&gt;
* A4, A6, A8, A10 6000 Series&lt;br /&gt;
* A4 PRO-7300B&lt;br /&gt;
* Athlon X4 750, 760K&lt;br /&gt;
==== Socket FP2 ====&lt;br /&gt;
* A4, A6, A8, A10 5000 Series (Mobile)&lt;br /&gt;
==== Socket FS1r2 ====&lt;br /&gt;
* A4, A6, A8, A10 5000 Series (Mobile)&lt;br /&gt;
=== KM, Komodo ===&lt;br /&gt;
==== Socket FM2 ====&lt;br /&gt;
* Canceled&lt;br /&gt;
== AMD 15h Steamroller CPUs ==&lt;br /&gt;
=== KV, Kaveri ===&lt;br /&gt;
=== GV, Godavari ===&lt;br /&gt;
&lt;br /&gt;
== AMD 15h Excavator CPUs ==&lt;br /&gt;
=== CZ, Carrizo ===&lt;br /&gt;
=== BR, Bristol Ridge ===&lt;br /&gt;
=== ST, Stoney Ridge ===&lt;br /&gt;
&lt;br /&gt;
== AMD 16h Jaguar CPUs ==&lt;br /&gt;
=== KB, Kabini ===&lt;br /&gt;
==== Socket AM1 ====&lt;br /&gt;
==== Socket FT3 ====&lt;br /&gt;
== AMD 16h Puma CPUs ==&lt;br /&gt;
=== ML, Mullins ===&lt;br /&gt;
==== Socket AM1 ====&lt;br /&gt;
==== Socket FT3b ====&lt;/div&gt;</summary>
		<author><name>Mrothfuss</name></author>
	</entry>
	<entry>
		<id>https://15h.org/index.php?title=Family_10h&amp;diff=2904</id>
		<title>Family 10h</title>
		<link rel="alternate" type="text/html" href="https://15h.org/index.php?title=Family_10h&amp;diff=2904"/>
		<updated>2026-05-31T19:52:43Z</updated>

		<summary type="html">&lt;p&gt;Mrothfuss: /* Overview */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{{Infobox cpu family&lt;br /&gt;
  |introduced = 2007&lt;br /&gt;
  |processnode = GlobalFoundries 45 nm SOI, with early models on 65 nm SOI&lt;br /&gt;
  |uarch1 = [[K10]]&lt;br /&gt;
  |predecessor = Family 0Fh (K8)&lt;br /&gt;
  |successor = [[Family 12h]] Llano;&lt;br /&gt;
  [[Family 15h]] Bulldozer&lt;br /&gt;
}}&lt;br /&gt;
&lt;br /&gt;
&#039;&#039;&#039;Family 10h&#039;&#039;&#039; (also known as &#039;&#039;&#039;fam10h&#039;&#039;&#039;, or ambiguously as &#039;&#039;&#039;fam10&#039;&#039;&#039;) is a [[CPU Families Overview|family of AMD microprocessors]] corresponding to the [[K10|K10 microarchitecure]]. However, the K10 microarchitecture is additionally used in the Family 12h &amp;quot;Llano&amp;quot; dies.&lt;br /&gt;
&lt;br /&gt;
&amp;quot;10h&amp;quot; (10-hexadecimal) is most correctly pronounced as &amp;quot;one-sixteen zero&amp;quot;, but most people say &amp;quot;ten‑aitch&amp;quot;.&lt;br /&gt;
&lt;br /&gt;
Like other AMD family names, 10h (&amp;quot;10 hexadecimal&amp;quot;) is a mostly-arbitrary, somewhat-sequential number, returned by the &amp;lt;code&amp;gt;CPUID&amp;lt;/code&amp;gt; instruction, and commonly written in hexadecimal. &lt;br /&gt;
&lt;br /&gt;
[[File:Magny-Cours GLOBALFUNDRIES.png|thumb|Magny-Cours Silicon&amp;lt;ref&amp;gt;https://15h.org/images/d/d1/HC21.24.110.Conway-AMD-Magny-Cours.pdf&amp;lt;/ref&amp;gt;]]&lt;br /&gt;
&lt;br /&gt;
== Overview ==&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;text-align:center;&amp;quot;&lt;br /&gt;
|+&lt;br /&gt;
!&lt;br /&gt;
! colspan=&amp;quot;6&amp;quot; |K10&lt;br /&gt;
|-&lt;br /&gt;
!&lt;br /&gt;
!Deerhound&lt;br /&gt;
!Ridgeback&lt;br /&gt;
!Bloodhound&lt;br /&gt;
!Dachshund&lt;br /&gt;
!Hydra&lt;br /&gt;
!Pharaoh Hound&lt;br /&gt;
|-&lt;br /&gt;
|Revision&lt;br /&gt;
|B&lt;br /&gt;
| colspan=&amp;quot;3&amp;quot; |C&lt;br /&gt;
|D&lt;br /&gt;
|E&lt;br /&gt;
|-&lt;br /&gt;
|Release Date&lt;br /&gt;
|2007&lt;br /&gt;
|2008&lt;br /&gt;
|2009&lt;br /&gt;
|2009&lt;br /&gt;
|2009&lt;br /&gt;
|2010&lt;br /&gt;
|-&lt;br /&gt;
|[[AGESA]]&lt;br /&gt;
|Closed Source&lt;br /&gt;
| colspan=&amp;quot;5&amp;quot; |[https://review.coreboot.org/c/coreboot/+/95 Open Source]&lt;br /&gt;
|-&lt;br /&gt;
|BKDG&lt;br /&gt;
| colspan=&amp;quot;6&amp;quot; |[https://15h.org/images/3/3f/31116_-_BIOS_and_Kernel_Developer%E2%80%99s_Guide_%28BKDG%29_For_AMD_Family_10h_Processors_%2831116%29.pdf 31116]&lt;br /&gt;
|-&lt;br /&gt;
|coreboot&lt;br /&gt;
| colspan=&amp;quot;6&amp;quot; |No&lt;br /&gt;
|-&lt;br /&gt;
|Microcode ROM&lt;br /&gt;
| colspan=&amp;quot;6&amp;quot; |Undocumented&lt;br /&gt;
|-&lt;br /&gt;
|Microcode Patches&lt;br /&gt;
| colspan=&amp;quot;6&amp;quot; |Unencrypted&lt;br /&gt;
|-&lt;br /&gt;
|[[PSP]]&lt;br /&gt;
| colspan=&amp;quot;6&amp;quot; |No&lt;br /&gt;
|}&lt;br /&gt;
&#039;&#039;For other CPU families besides Family 10h, see [[CPU Families Overview]]&#039;&#039;&lt;br /&gt;
&lt;br /&gt;
== Development Documentation Files and BKDG from AMD ==&lt;br /&gt;
This wiki hosts the following documens relevant for Family 10h coreboot development:&lt;br /&gt;
&lt;br /&gt;
* [[:File:31116 - BIOS and Kernel Developer’s Guide (BKDG) For AMD Family 10h Processors (31116).pdf|31116 - (BKGD) - BIOS and Kernel Developer’s Guide (BKDG) For AMD Family 10h Processors.pdf]]&lt;br /&gt;
* [[:File:41322 10h Rev Gd - Revision Guide for AMD Family 10h Processors (41322).pdf|41322 - (Family 10h) - Revision Guide for AMD Family 10h Processors.pdf]]&lt;br /&gt;
* [[:File:40546 - Software Optimization Guide for AMD Family 10h and 12h Processors (40546).pdf|40546 - Software Optimization Guide for AMD Family 10h and 12h Processors.pdf]]&lt;br /&gt;
* [[:File:43374 - AMD Family 10h Server and Workstation Processor Power and Thermal Data Sheet (43374).pdf|43374 - AMD Family 10h Server and Workstation Processor Power and Thermal Data Sheet.pdf]]&lt;br /&gt;
&lt;br /&gt;
== See Also ==&lt;br /&gt;
&lt;br /&gt;
* [[CPU Families Overview]]&lt;br /&gt;
* [[K10]]&lt;br /&gt;
&lt;br /&gt;
== References ==&lt;br /&gt;
&lt;br /&gt;
(2017 paper) Reverse Engineering x86 Processor Microcode&lt;br /&gt;
&amp;lt;ref name=&amp;quot;ReverseEngineering-x86&amp;quot;&amp;gt;&lt;br /&gt;
    https://www.usenix.org/system/files/conference/usenixsecurity17/sec17-koppe.pdf&amp;lt;/ref&amp;gt;&lt;/div&gt;</summary>
		<author><name>Mrothfuss</name></author>
	</entry>
	<entry>
		<id>https://15h.org/index.php?title=AMD_Codenames&amp;diff=2902</id>
		<title>AMD Codenames</title>
		<link rel="alternate" type="text/html" href="https://15h.org/index.php?title=AMD_Codenames&amp;diff=2902"/>
		<updated>2026-05-23T23:00:41Z</updated>

		<summary type="html">&lt;p&gt;Mrothfuss: /* AMD Platforms */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;This is an incomplete list of AMD Codenames.&lt;br /&gt;
&lt;br /&gt;
== AMD Platforms ==&lt;br /&gt;
* &#039;&#039;&#039;Tigris&#039;&#039;&#039;, K10 Socket S1g3 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Danube&#039;&#039;&#039;, K10 Socket S1g4 Platforms&lt;br /&gt;
* &#039;&#039;&#039;DanNi&#039;&#039;&#039;, K10 Socket S1g4 and ASB2 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Nile&#039;&#039;&#039;, K10 Socket ASB2 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Dragon&#039;&#039;&#039;, K10 Socket AM3 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Lynx&#039;&#039;&#039;, Llano Socket FM1 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Sabine&#039;&#039;&#039;, Llano Socket FS1 and FP1 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Brazos&#039;&#039;&#039;, Bobcat Socket FT1 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Deccan&#039;&#039;&#039;, Bobcat Socket FT2 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Scorpius&#039;&#039;&#039;, K10/Bulldozer/Piledriver Socket AM3 and AM3+ Platforms&lt;br /&gt;
* &#039;&#039;&#039;SanMarino&#039;&#039;&#039;, K10/Bulldozer/Piledriver Socket C32 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Maranello&#039;&#039;&#039;, K10/Bulldozer/Piledriver Socket G34 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Comal&#039;&#039;&#039;, Trinity Socket FS1 and FP2 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Virgo&#039;&#039;&#039;, Trinity Socket FM2 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Kerala&#039;&#039;&#039;, Kabini Socket FT3 Platforms&lt;br /&gt;
&lt;br /&gt;
== AMD 10h K10 CPUs ==&lt;br /&gt;
* [[K10|Detailed article]]&lt;br /&gt;
&lt;br /&gt;
=== DR, DeerHound ===&lt;br /&gt;
* [[K10 dies 65 nm|article: K10 dies 65 nm]]&lt;br /&gt;
==== Socket AM2+ ====&lt;br /&gt;
* Athlon X2 &amp;quot;Kuma&amp;quot;&lt;br /&gt;
* Phenom X3 &amp;quot;Toliman&amp;quot;&lt;br /&gt;
* Phenom X4 &amp;quot;Agena&amp;quot;&lt;br /&gt;
* Opteron 1300 &amp;quot;Budapest&amp;quot;&lt;br /&gt;
==== Socket Fr2 ====&lt;br /&gt;
* Opteron 2300/8300 &amp;quot;Barcelona&amp;quot;&lt;br /&gt;
&lt;br /&gt;
=== RB, RidgeBack ===&lt;br /&gt;
* [[K10 dies 45 nm|article: K10 dies 45 nm]]&lt;br /&gt;
==== Socket AM2+ ====&lt;br /&gt;
* Athlon X2&lt;br /&gt;
* Phenom II X3/X4&lt;br /&gt;
==== Socket AM3 ====&lt;br /&gt;
* Phenom II XLT (embedded)&lt;br /&gt;
* Phenom II X2/X3/X4&lt;br /&gt;
* Opteron 1300 &amp;quot;Suzuka&amp;quot;&lt;br /&gt;
==== Socket Fr2/Fr5 ====&lt;br /&gt;
* Opteron 2300/8300 &amp;quot;Shanghai&amp;quot; &lt;br /&gt;
=== BL ===&lt;br /&gt;
* [[K10 dies 45 nm|article: K10 dies 45 nm]]&lt;br /&gt;
==== Socket AM3 ====&lt;br /&gt;
* Athlon II X2/X3/X4&lt;br /&gt;
=== DA, Danube ===&lt;br /&gt;
* [[K10 dies 45 nm|article: K10 dies 45 nm]]&lt;br /&gt;
==== Socket ASB2 ====&lt;br /&gt;
* V-Series &lt;br /&gt;
* Athlon II Neo N/K/R&lt;br /&gt;
* Turion II Neo N/K &amp;quot;Geneva&amp;quot;&lt;br /&gt;
==== Socket S1g3/S1g4 ====&lt;br /&gt;
* Turion II M500 &lt;br /&gt;
* Turion II Ultra M600 &amp;quot;Caspian&amp;quot;&lt;br /&gt;
* V-Series&lt;br /&gt;
* Sempron M100&lt;br /&gt;
* Athlon II M300&lt;br /&gt;
* Phenom II N/P/X&lt;br /&gt;
==== Socket AM3 ====&lt;br /&gt;
* Sempron&lt;br /&gt;
* Sempron X2&lt;br /&gt;
* Athlon II XL &amp;amp; XLT (embedded)&lt;br /&gt;
* Athlon II&lt;br /&gt;
* Athlon II X2&lt;br /&gt;
=== HY, Hydra ===&lt;br /&gt;
* [[K10 dies 45 nm|article: K10 dies 45 nm]]&lt;br /&gt;
==== Socket Fr6 ====&lt;br /&gt;
* Opteron 2400/8400 &amp;quot;Istanbul&amp;quot;&lt;br /&gt;
==== Socket C32 ====&lt;br /&gt;
* Opteron 4100 &amp;quot;Lisbon&amp;quot;&lt;br /&gt;
==== Socket G34 ====&lt;br /&gt;
* Opteron 6100 &amp;quot;Magny Cours&amp;quot;&lt;br /&gt;
=== PH, Pharaoh Hound ===&lt;br /&gt;
* [[K10 dies 45 nm|article: K10 dies 45 nm]]&lt;br /&gt;
==== Socket AM3 ====&lt;br /&gt;
* Athlon II X4&lt;br /&gt;
* Phenom II X4 &amp;quot;Zosma&amp;quot;&lt;br /&gt;
* Phenom II X6 &amp;quot;Thuban&amp;quot;&lt;br /&gt;
== AMD 12h K10 CPUs ==&lt;br /&gt;
[[K10 dies 32 nm|detailed article (TO DO)]]&lt;br /&gt;
=== LN, Llano ===&lt;br /&gt;
==== Socket FM1 ====&lt;br /&gt;
* A4, A6, A8 3000 Series&lt;br /&gt;
* Athlon II X4 600 Series&lt;br /&gt;
* E2-3200&lt;br /&gt;
==== Socket FS1 ====&lt;br /&gt;
* A4, A6, A8 3000 Series (Mobile)&lt;br /&gt;
* E2-3000M&lt;br /&gt;
== AMD 14h Bobcat CPUs ==&lt;br /&gt;
=== ON, Ontario ===&lt;br /&gt;
==== Socket FT1 ====&lt;br /&gt;
* C-30, C-50, C-60, C-70&lt;br /&gt;
=== ??, Zacate ===&lt;br /&gt;
=== ??, Desna ===&lt;br /&gt;
== AMD 15h Bulldozer CPUs ==&lt;br /&gt;
=== OR, Orochi ===&lt;br /&gt;
==== Socket AM3+ ====&lt;br /&gt;
* AMD FX &amp;quot;Zambezi&amp;quot;&lt;br /&gt;
* Opteron 3200 &amp;quot;Zurich&amp;quot;&lt;br /&gt;
==== Socket C32 ====&lt;br /&gt;
* Opteron 4200 &amp;quot;Valencia&amp;quot;&lt;br /&gt;
==== Socket G34 ====&lt;br /&gt;
* Opteron 6200 &amp;quot;Interlagos&amp;quot;&lt;br /&gt;
== AMD 15h Piledriver CPUs ==&lt;br /&gt;
=== OR, Orochi ===&lt;br /&gt;
==== Socket AM3+ ====&lt;br /&gt;
* AMD FX &amp;quot;Vishera&amp;quot;&lt;br /&gt;
* Opteron 3300 &amp;quot;Delhi&amp;quot;&lt;br /&gt;
==== Socket C32 ====&lt;br /&gt;
* Opteron 4300 &amp;quot;Seoul&amp;quot;&lt;br /&gt;
==== Socket G34 ====&lt;br /&gt;
* Opteron 6300 &amp;quot;Abu Dhabi&amp;quot; and &amp;quot;Warsaw&amp;quot;&lt;br /&gt;
=== TN, Trinity ===&lt;br /&gt;
==== Socket FM2 ====&lt;br /&gt;
* A4, A6, A8, A10 5000 Series&lt;br /&gt;
* Sempron X2 240&lt;br /&gt;
* Athlon X2 340&lt;br /&gt;
* Athlon X4 730, 740, 750K&lt;br /&gt;
* FirePro A300, A320&lt;br /&gt;
==== Socket FP2 ====&lt;br /&gt;
* A4, A6, A8, A10 4000 Series (Mobile)&lt;br /&gt;
==== Socket FS1r2 ====&lt;br /&gt;
* A4, A6, A8, A10 4000 Series (Mobile)&lt;br /&gt;
=== RL, Richland ===&lt;br /&gt;
==== Socket FM2 ====&lt;br /&gt;
* A4, A6, A8, A10 6000 Series&lt;br /&gt;
* A4 PRO-7300B&lt;br /&gt;
* Athlon X4 750, 760K&lt;br /&gt;
==== Socket FP2 ====&lt;br /&gt;
* A4, A6, A8, A10 5000 Series (Mobile)&lt;br /&gt;
==== Socket FS1r2 ====&lt;br /&gt;
* A4, A6, A8, A10 5000 Series (Mobile)&lt;br /&gt;
=== KM, Komodo ===&lt;br /&gt;
==== Socket FM2 ====&lt;br /&gt;
* Canceled&lt;br /&gt;
== AMD 15h Steamroller CPUs ==&lt;br /&gt;
=== KV, Kaveri ===&lt;br /&gt;
=== GV, Godavari ===&lt;br /&gt;
&lt;br /&gt;
== AMD 15h Excavator CPUs ==&lt;br /&gt;
=== CZ, Carrizo ===&lt;br /&gt;
=== BR, Bristol Ridge ===&lt;br /&gt;
=== ST, Stoney Ridge ===&lt;br /&gt;
&lt;br /&gt;
== AMD 16h Jaguar CPUs ==&lt;br /&gt;
=== KB, Kabini ===&lt;br /&gt;
==== Socket AM1 ====&lt;br /&gt;
==== Socket FT3 ====&lt;br /&gt;
== AMD 16h Puma CPUs ==&lt;br /&gt;
=== ML, Mullins ===&lt;br /&gt;
==== Socket AM1 ====&lt;br /&gt;
==== Socket FT3b ====&lt;/div&gt;</summary>
		<author><name>Mrothfuss</name></author>
	</entry>
	<entry>
		<id>https://15h.org/index.php?title=AMD_Codenames&amp;diff=2901</id>
		<title>AMD Codenames</title>
		<link rel="alternate" type="text/html" href="https://15h.org/index.php?title=AMD_Codenames&amp;diff=2901"/>
		<updated>2026-05-23T22:51:46Z</updated>

		<summary type="html">&lt;p&gt;Mrothfuss: /* AMD Platforms */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;This is an incomplete list of AMD Codenames.&lt;br /&gt;
&lt;br /&gt;
== AMD Platforms ==&lt;br /&gt;
* &#039;&#039;&#039;Danube&#039;&#039;&#039;, K10 Socket S1g4 Platforms&lt;br /&gt;
* &#039;&#039;&#039;DanNi&#039;&#039;&#039;, K10 Socket S1g4 and ASB2 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Nile&#039;&#039;&#039;, K10 Socket ASB2 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Dragon&#039;&#039;&#039;, K10 Socket AM3 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Lynx&#039;&#039;&#039;, Llano Socket FM1 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Sabine&#039;&#039;&#039;, Llano Socket FS1 and FP1 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Brazos&#039;&#039;&#039;, Bobcat Socket FT1 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Deccan&#039;&#039;&#039;, Bobcat Socket FT2 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Scorpius&#039;&#039;&#039;, K10/Bulldozer/Piledriver Socket AM3 and AM3+ Platforms&lt;br /&gt;
* &#039;&#039;&#039;SanMarino&#039;&#039;&#039;, K10/Bulldozer/Piledriver Socket C32 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Maranello&#039;&#039;&#039;, K10/Bulldozer/Piledriver Socket G34 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Comal&#039;&#039;&#039;, Trinity Socket FS1 and FP2 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Virgo&#039;&#039;&#039;, Trinity Socket FM2 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Kerala&#039;&#039;&#039;, Kabini Socket FT3 Platforms&lt;br /&gt;
&lt;br /&gt;
== AMD 10h K10 CPUs ==&lt;br /&gt;
* [[K10|Detailed article]]&lt;br /&gt;
&lt;br /&gt;
=== DR, DeerHound ===&lt;br /&gt;
* [[K10 dies 65 nm|article: K10 dies 65 nm]]&lt;br /&gt;
==== Socket AM2+ ====&lt;br /&gt;
* Athlon X2 &amp;quot;Kuma&amp;quot;&lt;br /&gt;
* Phenom X3 &amp;quot;Toliman&amp;quot;&lt;br /&gt;
* Phenom X4 &amp;quot;Agena&amp;quot;&lt;br /&gt;
* Opteron 1300 &amp;quot;Budapest&amp;quot;&lt;br /&gt;
==== Socket Fr2 ====&lt;br /&gt;
* Opteron 2300/8300 &amp;quot;Barcelona&amp;quot;&lt;br /&gt;
&lt;br /&gt;
=== RB, RidgeBack ===&lt;br /&gt;
* [[K10 dies 45 nm|article: K10 dies 45 nm]]&lt;br /&gt;
==== Socket AM2+ ====&lt;br /&gt;
* Athlon X2&lt;br /&gt;
* Phenom II X3/X4&lt;br /&gt;
==== Socket AM3 ====&lt;br /&gt;
* Phenom II XLT (embedded)&lt;br /&gt;
* Phenom II X2/X3/X4&lt;br /&gt;
* Opteron 1300 &amp;quot;Suzuka&amp;quot;&lt;br /&gt;
==== Socket Fr2/Fr5 ====&lt;br /&gt;
* Opteron 2300/8300 &amp;quot;Shanghai&amp;quot; &lt;br /&gt;
=== BL ===&lt;br /&gt;
* [[K10 dies 45 nm|article: K10 dies 45 nm]]&lt;br /&gt;
==== Socket AM3 ====&lt;br /&gt;
* Athlon II X2/X3/X4&lt;br /&gt;
=== DA, Danube ===&lt;br /&gt;
* [[K10 dies 45 nm|article: K10 dies 45 nm]]&lt;br /&gt;
==== Socket ASB2 ====&lt;br /&gt;
* V-Series &lt;br /&gt;
* Athlon II Neo N/K/R&lt;br /&gt;
* Turion II Neo N/K &amp;quot;Geneva&amp;quot;&lt;br /&gt;
==== Socket S1g3/S1g4 ====&lt;br /&gt;
* Turion II M500 &lt;br /&gt;
* Turion II Ultra M600 &amp;quot;Caspian&amp;quot;&lt;br /&gt;
* V-Series&lt;br /&gt;
* Sempron M100&lt;br /&gt;
* Athlon II M300&lt;br /&gt;
* Phenom II N/P/X&lt;br /&gt;
==== Socket AM3 ====&lt;br /&gt;
* Sempron&lt;br /&gt;
* Sempron X2&lt;br /&gt;
* Athlon II XL &amp;amp; XLT (embedded)&lt;br /&gt;
* Athlon II&lt;br /&gt;
* Athlon II X2&lt;br /&gt;
=== HY, Hydra ===&lt;br /&gt;
* [[K10 dies 45 nm|article: K10 dies 45 nm]]&lt;br /&gt;
==== Socket Fr6 ====&lt;br /&gt;
* Opteron 2400/8400 &amp;quot;Istanbul&amp;quot;&lt;br /&gt;
==== Socket C32 ====&lt;br /&gt;
* Opteron 4100 &amp;quot;Lisbon&amp;quot;&lt;br /&gt;
==== Socket G34 ====&lt;br /&gt;
* Opteron 6100 &amp;quot;Magny Cours&amp;quot;&lt;br /&gt;
=== PH, Pharaoh Hound ===&lt;br /&gt;
* [[K10 dies 45 nm|article: K10 dies 45 nm]]&lt;br /&gt;
==== Socket AM3 ====&lt;br /&gt;
* Athlon II X4&lt;br /&gt;
* Phenom II X4 &amp;quot;Zosma&amp;quot;&lt;br /&gt;
* Phenom II X6 &amp;quot;Thuban&amp;quot;&lt;br /&gt;
== AMD 12h K10 CPUs ==&lt;br /&gt;
[[K10 dies 32 nm|detailed article (TO DO)]]&lt;br /&gt;
=== LN, Llano ===&lt;br /&gt;
==== Socket FM1 ====&lt;br /&gt;
* A4, A6, A8 3000 Series&lt;br /&gt;
* Athlon II X4 600 Series&lt;br /&gt;
* E2-3200&lt;br /&gt;
==== Socket FS1 ====&lt;br /&gt;
* A4, A6, A8 3000 Series (Mobile)&lt;br /&gt;
* E2-3000M&lt;br /&gt;
== AMD 14h Bobcat CPUs ==&lt;br /&gt;
=== ON, Ontario ===&lt;br /&gt;
==== Socket FT1 ====&lt;br /&gt;
* C-30, C-50, C-60, C-70&lt;br /&gt;
=== ??, Zacate ===&lt;br /&gt;
=== ??, Desna ===&lt;br /&gt;
== AMD 15h Bulldozer CPUs ==&lt;br /&gt;
=== OR, Orochi ===&lt;br /&gt;
==== Socket AM3+ ====&lt;br /&gt;
* AMD FX &amp;quot;Zambezi&amp;quot;&lt;br /&gt;
* Opteron 3200 &amp;quot;Zurich&amp;quot;&lt;br /&gt;
==== Socket C32 ====&lt;br /&gt;
* Opteron 4200 &amp;quot;Valencia&amp;quot;&lt;br /&gt;
==== Socket G34 ====&lt;br /&gt;
* Opteron 6200 &amp;quot;Interlagos&amp;quot;&lt;br /&gt;
== AMD 15h Piledriver CPUs ==&lt;br /&gt;
=== OR, Orochi ===&lt;br /&gt;
==== Socket AM3+ ====&lt;br /&gt;
* AMD FX &amp;quot;Vishera&amp;quot;&lt;br /&gt;
* Opteron 3300 &amp;quot;Delhi&amp;quot;&lt;br /&gt;
==== Socket C32 ====&lt;br /&gt;
* Opteron 4300 &amp;quot;Seoul&amp;quot;&lt;br /&gt;
==== Socket G34 ====&lt;br /&gt;
* Opteron 6300 &amp;quot;Abu Dhabi&amp;quot; and &amp;quot;Warsaw&amp;quot;&lt;br /&gt;
=== TN, Trinity ===&lt;br /&gt;
==== Socket FM2 ====&lt;br /&gt;
* A4, A6, A8, A10 5000 Series&lt;br /&gt;
* Sempron X2 240&lt;br /&gt;
* Athlon X2 340&lt;br /&gt;
* Athlon X4 730, 740, 750K&lt;br /&gt;
* FirePro A300, A320&lt;br /&gt;
==== Socket FP2 ====&lt;br /&gt;
* A4, A6, A8, A10 4000 Series (Mobile)&lt;br /&gt;
==== Socket FS1r2 ====&lt;br /&gt;
* A4, A6, A8, A10 4000 Series (Mobile)&lt;br /&gt;
=== RL, Richland ===&lt;br /&gt;
==== Socket FM2 ====&lt;br /&gt;
* A4, A6, A8, A10 6000 Series&lt;br /&gt;
* A4 PRO-7300B&lt;br /&gt;
* Athlon X4 750, 760K&lt;br /&gt;
==== Socket FP2 ====&lt;br /&gt;
* A4, A6, A8, A10 5000 Series (Mobile)&lt;br /&gt;
==== Socket FS1r2 ====&lt;br /&gt;
* A4, A6, A8, A10 5000 Series (Mobile)&lt;br /&gt;
=== KM, Komodo ===&lt;br /&gt;
==== Socket FM2 ====&lt;br /&gt;
* Canceled&lt;br /&gt;
== AMD 15h Steamroller CPUs ==&lt;br /&gt;
=== KV, Kaveri ===&lt;br /&gt;
=== GV, Godavari ===&lt;br /&gt;
&lt;br /&gt;
== AMD 15h Excavator CPUs ==&lt;br /&gt;
=== CZ, Carrizo ===&lt;br /&gt;
=== BR, Bristol Ridge ===&lt;br /&gt;
=== ST, Stoney Ridge ===&lt;br /&gt;
&lt;br /&gt;
== AMD 16h Jaguar CPUs ==&lt;br /&gt;
=== KB, Kabini ===&lt;br /&gt;
==== Socket AM1 ====&lt;br /&gt;
==== Socket FT3 ====&lt;br /&gt;
== AMD 16h Puma CPUs ==&lt;br /&gt;
=== ML, Mullins ===&lt;br /&gt;
==== Socket AM1 ====&lt;br /&gt;
==== Socket FT3b ====&lt;/div&gt;</summary>
		<author><name>Mrothfuss</name></author>
	</entry>
	<entry>
		<id>https://15h.org/index.php?title=Family_15h&amp;diff=2900</id>
		<title>Family 15h</title>
		<link rel="alternate" type="text/html" href="https://15h.org/index.php?title=Family_15h&amp;diff=2900"/>
		<updated>2026-05-23T22:34:59Z</updated>

		<summary type="html">&lt;p&gt;Mrothfuss: /* Overview */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{{Infobox cpu family&lt;br /&gt;
  |image = E422-opteron-6300-die-shot-16-core.jpg&lt;br /&gt;
  |image_size = 300&lt;br /&gt;
  |caption = The die of a 6300-series [[Opteron]], implementing the [[Piledriver]] microarchitecture.&lt;br /&gt;
  |introduced = October 12, 2011&lt;br /&gt;
  |processnode = GlobalFoundries 32nm SOI&lt;br /&gt;
  |uarch1 = [[Bulldozer]]&lt;br /&gt;
  |uarch2 = [[Piledriver]]&lt;br /&gt;
  |uarch3 = [[Steamroller]]&lt;br /&gt;
  |uarch4 = [[Excavator]]&lt;br /&gt;
  |predecessor = [[Family 10h]]&lt;br /&gt;
  |successor = Zen&lt;br /&gt;
}}&lt;br /&gt;
&lt;br /&gt;
&#039;&#039;&#039;Family 15h&#039;&#039;&#039; (also known as &#039;&#039;&#039;fam15h&#039;&#039;&#039;, or ambiguously as &#039;&#039;&#039;fam15&#039;&#039;&#039;) is a [[CPU Families Overview|family of AMD microprocessors]] corresponding to the [[Bulldozer]], [[Piledriver]], [[Steamroller]], and [[Excavator]] microarchitectures.&lt;br /&gt;
&lt;br /&gt;
&amp;quot;15h&amp;quot; (15-hexadecimal) is most correctly pronounced as &amp;quot;one-sixteen five&amp;quot;, but most people say &amp;quot;fifteen‑aitch&amp;quot;.&lt;br /&gt;
&lt;br /&gt;
Like other AMD family names, &amp;quot;15h&amp;quot; is a mostly-arbitrary, somewhat-sequential number, returned by the &amp;lt;code&amp;gt;CPUID&amp;lt;/code&amp;gt; instruction. The number 15h corresponds to the value 21, meaning that &amp;quot;Family 21&amp;quot; would also be a valid, if confusing, name for these CPUs. &amp;quot;Family 15&amp;quot; could confusingly refer to the Family 0Fh (K8 CPUs, first released in 2003).&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Overview ==&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;text-align:center;&amp;quot;&lt;br /&gt;
|+&lt;br /&gt;
!&lt;br /&gt;
!Bulldozer&lt;br /&gt;
! colspan=&amp;quot;3&amp;quot; |Piledriver&lt;br /&gt;
! colspan=&amp;quot;2&amp;quot; |Steamroller&lt;br /&gt;
! colspan=&amp;quot;3&amp;quot; |Excavator&lt;br /&gt;
|-&lt;br /&gt;
!&lt;br /&gt;
! colspan=&amp;quot;2&amp;quot; |Orochi&lt;br /&gt;
!Trinity&lt;br /&gt;
!Richland&lt;br /&gt;
!Kaveri&lt;br /&gt;
!Godavari&lt;br /&gt;
!Carrizo&lt;br /&gt;
!Bristol Ridge&lt;br /&gt;
!Stoney Ridge&lt;br /&gt;
|-&lt;br /&gt;
|Models&lt;br /&gt;
| colspan=&amp;quot;2&amp;quot; |00h-0Fh&lt;br /&gt;
| colspan=&amp;quot;2&amp;quot; |10h-1Fh&lt;br /&gt;
| colspan=&amp;quot;2&amp;quot; |30h-3Fh&lt;br /&gt;
| colspan=&amp;quot;2&amp;quot; |60h-6Fh&lt;br /&gt;
|70h-7Fh&lt;br /&gt;
|-&lt;br /&gt;
|Release Date&lt;br /&gt;
|2011/10&lt;br /&gt;
|2012/05&lt;br /&gt;
|2012/10&lt;br /&gt;
|2013/06&lt;br /&gt;
|2014/01&lt;br /&gt;
|2015/05&lt;br /&gt;
|2015/06&lt;br /&gt;
|2016/05&lt;br /&gt;
|2016/06&lt;br /&gt;
|-&lt;br /&gt;
|[[AGESA]]&lt;br /&gt;
| colspan=&amp;quot;2&amp;quot; |[https://review.coreboot.org/c/coreboot/+/554 Open Source]&lt;br /&gt;
| colspan=&amp;quot;2&amp;quot; |[http://review.coreboot.org/1155 Open Source]&lt;br /&gt;
| colspan=&amp;quot;5&amp;quot; |Closed Source&lt;br /&gt;
|-&lt;br /&gt;
|BKDG&lt;br /&gt;
| colspan=&amp;quot;2&amp;quot; |[https://15h.org/images/b/be/42301_15h_Mod_00h-0Fh_BKDG.pdf 42301]&lt;br /&gt;
| colspan=&amp;quot;2&amp;quot; |[https://15h.org/images/4/49/42300_15h_Mod_10h-1Fh_BKDG.pdf 42300]&lt;br /&gt;
| colspan=&amp;quot;2&amp;quot; |[https://15h.org/images/0/02/49125_15h_Models_30h-3Fh_BKDG.pdf 49125]&lt;br /&gt;
| colspan=&amp;quot;2&amp;quot; |[https://15h.org/images/3/3f/50742_15h_Models_60h-6Fh_BKDG.pdf 50742]&lt;br /&gt;
|[https://15h.org/images/c/c8/55072_AMD_Family_15h_Models_70h-7Fh_BKDG.pdf 55072]&lt;br /&gt;
|-&lt;br /&gt;
|coreboot&lt;br /&gt;
| colspan=&amp;quot;2&amp;quot; style=&amp;quot;background-color:#AFA&amp;quot; | [[Family_15h#Orochi|Yes]]&lt;br /&gt;
| colspan=&amp;quot;2&amp;quot; style=&amp;quot;background-color:#AFA&amp;quot; | [[Family_15h#Trinity_and_Richland|Yes]]&lt;br /&gt;
| colspan=&amp;quot;4&amp;quot; style=&amp;quot;background-color:#FAA&amp;quot; | No&lt;br /&gt;
| style=&amp;quot;background-color:#AFA&amp;quot; | [[Family_15h#Stoney_Ridge|Yes]]&lt;br /&gt;
|-&lt;br /&gt;
|Microcode ROM&lt;br /&gt;
| colspan=&amp;quot;9&amp;quot; |Undocumented&lt;br /&gt;
|-&lt;br /&gt;
|Microcode Patches&lt;br /&gt;
| colspan=&amp;quot;4&amp;quot; |Encrypted&amp;lt;ref&amp;gt;https://www.dcddcc.com/docs/2014_paper_microcode.pdf&amp;lt;/ref&amp;gt;&lt;br /&gt;
| colspan=&amp;quot;5&amp;quot; |TBD&lt;br /&gt;
|-&lt;br /&gt;
|[[PSP]]&lt;br /&gt;
| colspan=&amp;quot;4&amp;quot; |No&lt;br /&gt;
| colspan=&amp;quot;2&amp;quot; |Offline&lt;br /&gt;
| colspan=&amp;quot;3&amp;quot; |Online&lt;br /&gt;
|}&lt;br /&gt;
&#039;&#039;For other CPU families besides Family 15h, see [[CPU Families Overview]]&#039;&#039;&lt;br /&gt;
&lt;br /&gt;
== coreboot Compatible Motherboards ==&lt;br /&gt;
=== Orochi ===&lt;br /&gt;
* Socket [[AM3+]]&lt;br /&gt;
** [[H8SML|Supermicro H8SML]] (μ-ATX)&lt;br /&gt;
** [[ASUS Sabertooth 990FX R2.0]] (ATX)&lt;br /&gt;
** [[ASUS Crosshair V Formula-Z]] (ATX)&lt;br /&gt;
* Socket [[C32]]&lt;br /&gt;
** [[Supermicro H8SCM]] (μ-ATX)&lt;br /&gt;
** [[ASUS KCMA-D8]] (SSI CEB)&lt;br /&gt;
* Socket [[G34]]&lt;br /&gt;
** [[ASUS KGPE-D16]] (SSI EEB)&lt;br /&gt;
** [[Supermicro H8QG6]] (SWTX)&lt;br /&gt;
** [[Supermicro H8SGL]] (ATX)&lt;br /&gt;
=== Trinity and Richland ===&lt;br /&gt;
* Socket [[FM2]]&lt;br /&gt;
** [[F2A85-M|ASUS F2A85-M]] (μ-ATX)&lt;br /&gt;
* Socket [[FS1|FS1r2]]&lt;br /&gt;
** [[G505s|Lenovo G505s]] (Laptop, 15.6in)&lt;br /&gt;
=== Stoney Ridge ===&lt;br /&gt;
* Chromebooks supported by [https://docs.mrchromebox.tech/ MrChromebox].&lt;br /&gt;
** Acer Chromebook 315 (CB315-2H)&lt;br /&gt;
** HP Chromebook 11A G6 EE&lt;br /&gt;
** HP Chromebook 11A G8 EE&lt;br /&gt;
** HP Chromebook 14A G5&lt;br /&gt;
** Acer Chromebook 311 (C721)&lt;br /&gt;
** Acer Chromebook Spin 311 (R721T)&lt;br /&gt;
** Lenovo 14e Chromebook (S345)&lt;br /&gt;
** Lenovo 100e Chromebook Gen 2 AMD&lt;br /&gt;
** Lenovo IdeaPad 3 Chromebook 11AST5&lt;br /&gt;
** Lenovo 300e Chromebook Gen 2 AMD&lt;br /&gt;
** NEC Chromebook Y1 Gen2A&lt;br /&gt;
&lt;br /&gt;
== Notes and Status ==&lt;br /&gt;
* All x86 CPUs include proprietary microcode, in ROM on the CPU itself. Later vendor-provided patches, which update part of this microcode, can be loaded at runtime - these patches are proprietary blobs.&lt;br /&gt;
* All Family 15h CPUs are vulnerable to speculative execution exploits if a microcode patch is not loaded.&lt;br /&gt;
* Apart from the above, Bulldozer CPUs are generally stable even without microcode patches.&lt;br /&gt;
* A microcode patch is strongly recommended for Piledriver CPUs, because of known virtualization-related bugs in their ROM microcode.&lt;br /&gt;
* Trinity APUs and Richland APUs additionally require the SMU firmware blob to run. The [[SMU|SMU (System Management Unit)]] is a microcontroller inside AMD SoCs/APUs that handles low-level platform management: power, clocks, voltage, thermal control, power-gating, and related sensors and interrupts. The firmware for this microcontroller is a blob, [https://git.15h.org/mrothfuss/coreboot-15h/src/branch/4.11_branch/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GnbSmuFirmwareTN.h included as a large array] in the Family 15h [[AGESA]]. Orochi platforms do not require this blob.&lt;br /&gt;
&lt;br /&gt;
== Microcode Patches ==&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
|+Below is the list of ucode versions that could be pulled from the container files in the linux kernel&lt;br /&gt;
!commit&lt;br /&gt;
!comment&lt;br /&gt;
!date&lt;br /&gt;
!ucode version&lt;br /&gt;
!Microarchitecture&lt;br /&gt;
|-&lt;br /&gt;
|[https://kernel.googlesource.com/pub/scm/linux/kernel/git/firmware/linux-firmware/+archive/31f6b3076bab3c4b65f67fdb232f4579ed828b4f.tar.gz 31f6b30]&lt;br /&gt;
|linux-firmware: Add AMD microcode patch firmware files&lt;br /&gt;
|Jul 11 2013&lt;br /&gt;
|06000822&lt;br /&gt;
|&lt;br /&gt;
|-&lt;br /&gt;
|[https://kernel.googlesource.com/pub/scm/linux/kernel/git/firmware/linux-firmware/+archive/8ac569dd3ca3ca685bd47ee86c1eeb6050864db3.tar.gz 8ac569d]&lt;br /&gt;
|linux-firmware: Update AMD microcode patch firmware files&lt;br /&gt;
|Nov 30 2014&lt;br /&gt;
|06000832&lt;br /&gt;
|&lt;br /&gt;
|-&lt;br /&gt;
|[https://kernel.googlesource.com/pub/scm/linux/kernel/git/firmware/linux-firmware/+archive/5f8ca0c1db6106a2d6d7e85eee778917ff03c3de.tar.gz 5f8ca0c]&lt;br /&gt;
|linux-firmware: Update AMD microcode patch firmware&lt;br /&gt;
|Mar 18 2016&lt;br /&gt;
|0600084f&lt;br /&gt;
|&lt;br /&gt;
|-&lt;br /&gt;
|[https://kernel.googlesource.com/pub/scm/linux/kernel/git/firmware/linux-firmware/+archive/77101513943ef198e2050667c87abf19e6cbb1d8.tar.gz 7710151]&lt;br /&gt;
|linux-firmware: Update AMD cpu microcode&lt;br /&gt;
|May 18 2018&lt;br /&gt;
|06000852&lt;br /&gt;
|Piledriver&lt;br /&gt;
|-&lt;br /&gt;
|[https://kernel.googlesource.com/pub/scm/linux/kernel/git/firmware/linux-firmware/+archive/7518922bd5b98b137af7aaf3c836f5a498e91609.tar.gz 7518922]&lt;br /&gt;
|Update AMD cpu microcode for family 15h&lt;br /&gt;
|May 25 2018&lt;br /&gt;
|0600063e&lt;br /&gt;
|Bulldozer&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Developer Documentation ==&lt;br /&gt;
[[File:Socket G34 pinmap.svg|thumb|G34 socket pinout]]&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
|+Below is the documentation for all 15h model revisions&lt;br /&gt;
!Model rage&lt;br /&gt;
!Date&lt;br /&gt;
!Revision&lt;br /&gt;
!Link&lt;br /&gt;
|-&lt;br /&gt;
|00h-0Fh&lt;br /&gt;
|September 2014&lt;br /&gt;
|3.24&lt;br /&gt;
|[https://web.archive.org/web/20220321092743/https://www.amd.com/system/files/TechDocs/48063_15h_Mod_00h-0Fh_Rev_Guide.pdf 48063_15h_Mod_00h-0Fh_Rev_Guide.pdf]&lt;br /&gt;
|-&lt;br /&gt;
|10h-1Fh&lt;br /&gt;
|August 2012&lt;br /&gt;
|3.08&lt;br /&gt;
|[https://web.archive.org/web/20220129072252/https://www.amd.com/system/files/TechDocs/48931_15h_Mod_10h-1Fh_Rev_Guide.pdf 48931_15h_Mod_10h-1Fh_Rev_Guide.pdf]&lt;br /&gt;
|-&lt;br /&gt;
|30h-3Fh&lt;br /&gt;
|April 2014&lt;br /&gt;
|1.06&lt;br /&gt;
|[https://web.archive.org/web/20220121164248/https://www.amd.com/system/files/TechDocs/51603_Rev_Guide_15h_Models_30h-3Fh.pdf 51603_Rev_Guide_15h_Models_30h-3Fh.pdf]&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== See Also ==&lt;br /&gt;
&lt;br /&gt;
* [[CPU Families Overview]]&lt;br /&gt;
* [[AMD Codenames]]&lt;br /&gt;
* [[Abbreviations and Acronyms List]]&lt;br /&gt;
&lt;br /&gt;
== References ==&lt;/div&gt;</summary>
		<author><name>Mrothfuss</name></author>
	</entry>
	<entry>
		<id>https://15h.org/index.php?title=Family_12h&amp;diff=2899</id>
		<title>Family 12h</title>
		<link rel="alternate" type="text/html" href="https://15h.org/index.php?title=Family_12h&amp;diff=2899"/>
		<updated>2026-05-23T21:45:10Z</updated>

		<summary type="html">&lt;p&gt;Mrothfuss: /* Overview */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;&lt;br /&gt;
&#039;&#039;&#039;Family 12h&#039;&#039;&#039; (also known as &#039;&#039;&#039;fam12h&#039;&#039;&#039;, or ambiguously as &#039;&#039;&#039;fam12&#039;&#039;&#039;) is a [[CPU Families Overview|family of AMD microprocessors]] corresponding to the [[K10|K10 microarchitecure]]. However, the K10 microarchitecture is additionally used in the [[Family 10h]] dies.&lt;br /&gt;
&lt;br /&gt;
&amp;quot;12h&amp;quot; (12-hexadecimal) is most correctly pronounced as &amp;quot;one-sixteen two&amp;quot;, but most people say &amp;quot;twelve‑aitch&amp;quot;.&lt;br /&gt;
&lt;br /&gt;
== Overview ==&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;text-align:center;&amp;quot;&lt;br /&gt;
|+&lt;br /&gt;
!&lt;br /&gt;
!K10&lt;br /&gt;
|-&lt;br /&gt;
!&lt;br /&gt;
!Llano&lt;br /&gt;
|-&lt;br /&gt;
|Revision&lt;br /&gt;
|B&lt;br /&gt;
|-&lt;br /&gt;
|Release Date&lt;br /&gt;
|2011/08&lt;br /&gt;
|-&lt;br /&gt;
|[[AGESA]]&lt;br /&gt;
|[http://review.coreboot.org/40 Open Source]&lt;br /&gt;
|-&lt;br /&gt;
|BKDG&lt;br /&gt;
|[https://15h.org/images/6/64/12h_bkdg_pub_-_BIOS_and_Kernel_Developer%27s_Guide_for_AMD_Family_12h_Processors.pdf 41131]&lt;br /&gt;
|-&lt;br /&gt;
|coreboot&lt;br /&gt;
| style=&amp;quot;background-color:#FAA&amp;quot; | No&lt;br /&gt;
|-&lt;br /&gt;
|Microcode ROM&lt;br /&gt;
|Undocumented&lt;br /&gt;
|-&lt;br /&gt;
|Microcode Patches&lt;br /&gt;
|Unencrypted&lt;br /&gt;
|-&lt;br /&gt;
|[[PSP]]&lt;br /&gt;
|No&lt;br /&gt;
|}&lt;br /&gt;
&#039;&#039;For other CPU families besides Family 12h, see [[CPU Families Overview]]&#039;&#039;&lt;br /&gt;
&lt;br /&gt;
== See Also ==&lt;br /&gt;
&lt;br /&gt;
* [[CPU Families Overview]]&lt;br /&gt;
* [[K10]]&lt;br /&gt;
* [[AMD Codenames]]&lt;br /&gt;
&lt;br /&gt;
== References ==&lt;br /&gt;
(2014 paper) Security Analysis of x86 Processor Microcode&lt;br /&gt;
&amp;lt;ref name=&amp;quot;Security-x86&amp;quot;&amp;gt;&lt;br /&gt;
    https://www.dcddcc.com/docs/2014_paper_microcode.pdf&amp;lt;/ref&amp;gt;&lt;br /&gt;
&lt;br /&gt;
(2017 paper) Reverse Engineering x86 Processor Microcode&lt;br /&gt;
&amp;lt;ref name=&amp;quot;ReverseEngineering-x86&amp;quot;&amp;gt;&lt;br /&gt;
    https://www.usenix.org/system/files/conference/usenixsecurity17/sec17-koppe.pdf&amp;lt;/ref&amp;gt;&lt;/div&gt;</summary>
		<author><name>Mrothfuss</name></author>
	</entry>
	<entry>
		<id>https://15h.org/index.php?title=Family_10h&amp;diff=2898</id>
		<title>Family 10h</title>
		<link rel="alternate" type="text/html" href="https://15h.org/index.php?title=Family_10h&amp;diff=2898"/>
		<updated>2026-05-23T21:37:37Z</updated>

		<summary type="html">&lt;p&gt;Mrothfuss: /* Overview */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{{Infobox cpu family&lt;br /&gt;
  |introduced = 2007&lt;br /&gt;
  |processnode = GlobalFoundries 45 nm SOI, with early models on 65 nm SOI&lt;br /&gt;
  |uarch1 = [[K10]]&lt;br /&gt;
  |predecessor = Family 0Fh (K8)&lt;br /&gt;
  |successor = [[Family 12h]] Llano;&lt;br /&gt;
  [[Family 15h]] Bulldozer&lt;br /&gt;
}}&lt;br /&gt;
&lt;br /&gt;
&#039;&#039;&#039;Family 10h&#039;&#039;&#039; (also known as &#039;&#039;&#039;fam10h&#039;&#039;&#039;, or ambiguously as &#039;&#039;&#039;fam10&#039;&#039;&#039;) is a [[CPU Families Overview|family of AMD microprocessors]] corresponding to the [[K10|K10 microarchitecure]]. However, the K10 microarchitecture is additionally used in the Family 12h &amp;quot;Llano&amp;quot; dies.&lt;br /&gt;
&lt;br /&gt;
&amp;quot;10h&amp;quot; (10-hexadecimal) is most correctly pronounced as &amp;quot;one-sixteen zero&amp;quot;, but most people say &amp;quot;ten‑aitch&amp;quot;.&lt;br /&gt;
&lt;br /&gt;
Like other AMD family names, 10h (&amp;quot;10 hexadecimal&amp;quot;) is a mostly-arbitrary, somewhat-sequential number, returned by the &amp;lt;code&amp;gt;CPUID&amp;lt;/code&amp;gt; instruction, and commonly written in hexadecimal. &lt;br /&gt;
&lt;br /&gt;
[[File:Magny-Cours GLOBALFUNDRIES.png|thumb|Magny-Cours Silicon&amp;lt;ref&amp;gt;https://15h.org/images/d/d1/HC21.24.110.Conway-AMD-Magny-Cours.pdf&amp;lt;/ref&amp;gt;]]&lt;br /&gt;
&lt;br /&gt;
== Overview ==&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;text-align:center;&amp;quot;&lt;br /&gt;
|+&lt;br /&gt;
!&lt;br /&gt;
! colspan=&amp;quot;6&amp;quot; |K10&lt;br /&gt;
|-&lt;br /&gt;
!&lt;br /&gt;
!DR&lt;br /&gt;
!RB&lt;br /&gt;
!BL&lt;br /&gt;
!DA&lt;br /&gt;
!Hydra&lt;br /&gt;
!Pharaoh Hound&lt;br /&gt;
|-&lt;br /&gt;
|Revision&lt;br /&gt;
|B&lt;br /&gt;
| colspan=&amp;quot;3&amp;quot; |C&lt;br /&gt;
|D&lt;br /&gt;
|E&lt;br /&gt;
|-&lt;br /&gt;
|Release Date&lt;br /&gt;
|2007&lt;br /&gt;
|2008&lt;br /&gt;
|2009&lt;br /&gt;
|2009&lt;br /&gt;
|2009&lt;br /&gt;
|2010&lt;br /&gt;
|-&lt;br /&gt;
|[[AGESA]]&lt;br /&gt;
|Closed Source&lt;br /&gt;
| colspan=&amp;quot;5&amp;quot; |[https://review.coreboot.org/c/coreboot/+/95 Open Source]&lt;br /&gt;
|-&lt;br /&gt;
|BKDG&lt;br /&gt;
| colspan=&amp;quot;6&amp;quot; |[https://15h.org/images/3/3f/31116_-_BIOS_and_Kernel_Developer%E2%80%99s_Guide_%28BKDG%29_For_AMD_Family_10h_Processors_%2831116%29.pdf 31116]&lt;br /&gt;
|-&lt;br /&gt;
|coreboot&lt;br /&gt;
| colspan=&amp;quot;6&amp;quot; |No&lt;br /&gt;
|-&lt;br /&gt;
|Microcode ROM&lt;br /&gt;
| colspan=&amp;quot;6&amp;quot; |Undocumented&lt;br /&gt;
|-&lt;br /&gt;
|Microcode Patches&lt;br /&gt;
| colspan=&amp;quot;6&amp;quot; |Unencrypted&lt;br /&gt;
|-&lt;br /&gt;
|[[PSP]]&lt;br /&gt;
| colspan=&amp;quot;6&amp;quot; |No&lt;br /&gt;
|}&lt;br /&gt;
&#039;&#039;For other CPU families besides Family 10h, see [[CPU Families Overview]]&#039;&#039;&lt;br /&gt;
&lt;br /&gt;
== Development Documentation Files and BKDG from AMD ==&lt;br /&gt;
This wiki hosts the following documens relevant for Family 10h coreboot development:&lt;br /&gt;
&lt;br /&gt;
* [[:File:31116 - BIOS and Kernel Developer’s Guide (BKDG) For AMD Family 10h Processors (31116).pdf|31116 - (BKGD) - BIOS and Kernel Developer’s Guide (BKDG) For AMD Family 10h Processors.pdf]]&lt;br /&gt;
* [[:File:41322 10h Rev Gd - Revision Guide for AMD Family 10h Processors (41322).pdf|41322 - (Family 10h) - Revision Guide for AMD Family 10h Processors.pdf]]&lt;br /&gt;
* [[:File:40546 - Software Optimization Guide for AMD Family 10h and 12h Processors (40546).pdf|40546 - Software Optimization Guide for AMD Family 10h and 12h Processors.pdf]]&lt;br /&gt;
* [[:File:43374 - AMD Family 10h Server and Workstation Processor Power and Thermal Data Sheet (43374).pdf|43374 - AMD Family 10h Server and Workstation Processor Power and Thermal Data Sheet.pdf]]&lt;br /&gt;
&lt;br /&gt;
== See Also ==&lt;br /&gt;
&lt;br /&gt;
* [[CPU Families Overview]]&lt;br /&gt;
* [[K10]]&lt;br /&gt;
&lt;br /&gt;
== References ==&lt;br /&gt;
&lt;br /&gt;
(2017 paper) Reverse Engineering x86 Processor Microcode&lt;br /&gt;
&amp;lt;ref name=&amp;quot;ReverseEngineering-x86&amp;quot;&amp;gt;&lt;br /&gt;
    https://www.usenix.org/system/files/conference/usenixsecurity17/sec17-koppe.pdf&amp;lt;/ref&amp;gt;&lt;/div&gt;</summary>
		<author><name>Mrothfuss</name></author>
	</entry>
	<entry>
		<id>https://15h.org/index.php?title=Family_10h&amp;diff=2897</id>
		<title>Family 10h</title>
		<link rel="alternate" type="text/html" href="https://15h.org/index.php?title=Family_10h&amp;diff=2897"/>
		<updated>2026-05-23T21:07:50Z</updated>

		<summary type="html">&lt;p&gt;Mrothfuss: /* Overview */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{{Infobox cpu family&lt;br /&gt;
  |introduced = 2007&lt;br /&gt;
  |processnode = GlobalFoundries 45 nm SOI, with early models on 65 nm SOI&lt;br /&gt;
  |uarch1 = [[K10]]&lt;br /&gt;
  |predecessor = Family 0Fh (K8)&lt;br /&gt;
  |successor = [[Family 12h]] Llano;&lt;br /&gt;
  [[Family 15h]] Bulldozer&lt;br /&gt;
}}&lt;br /&gt;
&lt;br /&gt;
&#039;&#039;&#039;Family 10h&#039;&#039;&#039; (also known as &#039;&#039;&#039;fam10h&#039;&#039;&#039;, or ambiguously as &#039;&#039;&#039;fam10&#039;&#039;&#039;) is a [[CPU Families Overview|family of AMD microprocessors]] corresponding to the [[K10|K10 microarchitecure]]. However, the K10 microarchitecture is additionally used in the Family 12h &amp;quot;Llano&amp;quot; dies.&lt;br /&gt;
&lt;br /&gt;
&amp;quot;10h&amp;quot; (10-hexadecimal) is most correctly pronounced as &amp;quot;one-sixteen zero&amp;quot;, but most people say &amp;quot;ten‑aitch&amp;quot;.&lt;br /&gt;
&lt;br /&gt;
Like other AMD family names, 10h (&amp;quot;10 hexadecimal&amp;quot;) is a mostly-arbitrary, somewhat-sequential number, returned by the &amp;lt;code&amp;gt;CPUID&amp;lt;/code&amp;gt; instruction, and commonly written in hexadecimal. &lt;br /&gt;
&lt;br /&gt;
[[File:Magny-Cours GLOBALFUNDRIES.png|thumb|Magny-Cours Silicon&amp;lt;ref&amp;gt;https://15h.org/images/d/d1/HC21.24.110.Conway-AMD-Magny-Cours.pdf&amp;lt;/ref&amp;gt;]]&lt;br /&gt;
&lt;br /&gt;
== Overview ==&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;text-align:center;&amp;quot;&lt;br /&gt;
|+&lt;br /&gt;
!&lt;br /&gt;
! colspan=&amp;quot;6&amp;quot; |K10&lt;br /&gt;
|-&lt;br /&gt;
!&lt;br /&gt;
!DR&lt;br /&gt;
!RB&lt;br /&gt;
!BL&lt;br /&gt;
!DA&lt;br /&gt;
!Hydra&lt;br /&gt;
!Pharaoh Hound&lt;br /&gt;
|-&lt;br /&gt;
|Revision&lt;br /&gt;
|B&lt;br /&gt;
| colspan=&amp;quot;3&amp;quot; |C&lt;br /&gt;
|D&lt;br /&gt;
|E&lt;br /&gt;
|-&lt;br /&gt;
|Release Date&lt;br /&gt;
| colspan=&amp;quot;6&amp;quot; |2007-2012&lt;br /&gt;
|-&lt;br /&gt;
|[[AGESA]]&lt;br /&gt;
|Closed Source&lt;br /&gt;
| colspan=&amp;quot;5&amp;quot; |[https://review.coreboot.org/c/coreboot/+/95 Open Source]&lt;br /&gt;
|-&lt;br /&gt;
|BKDG&lt;br /&gt;
| colspan=&amp;quot;6&amp;quot; |[https://15h.org/images/3/3f/31116_-_BIOS_and_Kernel_Developer%E2%80%99s_Guide_%28BKDG%29_For_AMD_Family_10h_Processors_%2831116%29.pdf 31116]&lt;br /&gt;
|-&lt;br /&gt;
|coreboot&lt;br /&gt;
| colspan=&amp;quot;6&amp;quot; |No&lt;br /&gt;
|-&lt;br /&gt;
|Microcode ROM&lt;br /&gt;
| colspan=&amp;quot;6&amp;quot; |Undocumented&lt;br /&gt;
|-&lt;br /&gt;
|Microcode Patches&lt;br /&gt;
| colspan=&amp;quot;6&amp;quot; |Unencrypted&lt;br /&gt;
|-&lt;br /&gt;
|[[PSP]]&lt;br /&gt;
| colspan=&amp;quot;6&amp;quot; |No&lt;br /&gt;
|}&lt;br /&gt;
&#039;&#039;For other CPU families besides Family 10h, see [[CPU Families Overview]]&#039;&#039;&lt;br /&gt;
&lt;br /&gt;
== Development Documentation Files and BKDG from AMD ==&lt;br /&gt;
This wiki hosts the following documens relevant for Family 10h coreboot development:&lt;br /&gt;
&lt;br /&gt;
* [[:File:31116 - BIOS and Kernel Developer’s Guide (BKDG) For AMD Family 10h Processors (31116).pdf|31116 - (BKGD) - BIOS and Kernel Developer’s Guide (BKDG) For AMD Family 10h Processors.pdf]]&lt;br /&gt;
* [[:File:41322 10h Rev Gd - Revision Guide for AMD Family 10h Processors (41322).pdf|41322 - (Family 10h) - Revision Guide for AMD Family 10h Processors.pdf]]&lt;br /&gt;
* [[:File:40546 - Software Optimization Guide for AMD Family 10h and 12h Processors (40546).pdf|40546 - Software Optimization Guide for AMD Family 10h and 12h Processors.pdf]]&lt;br /&gt;
* [[:File:43374 - AMD Family 10h Server and Workstation Processor Power and Thermal Data Sheet (43374).pdf|43374 - AMD Family 10h Server and Workstation Processor Power and Thermal Data Sheet.pdf]]&lt;br /&gt;
&lt;br /&gt;
== See Also ==&lt;br /&gt;
&lt;br /&gt;
* [[CPU Families Overview]]&lt;br /&gt;
* [[K10]]&lt;br /&gt;
&lt;br /&gt;
== References ==&lt;br /&gt;
&lt;br /&gt;
(2017 paper) Reverse Engineering x86 Processor Microcode&lt;br /&gt;
&amp;lt;ref name=&amp;quot;ReverseEngineering-x86&amp;quot;&amp;gt;&lt;br /&gt;
    https://www.usenix.org/system/files/conference/usenixsecurity17/sec17-koppe.pdf&amp;lt;/ref&amp;gt;&lt;/div&gt;</summary>
		<author><name>Mrothfuss</name></author>
	</entry>
	<entry>
		<id>https://15h.org/index.php?title=Family_12h&amp;diff=2896</id>
		<title>Family 12h</title>
		<link rel="alternate" type="text/html" href="https://15h.org/index.php?title=Family_12h&amp;diff=2896"/>
		<updated>2026-05-23T16:44:30Z</updated>

		<summary type="html">&lt;p&gt;Mrothfuss: /* Overview */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;&lt;br /&gt;
&#039;&#039;&#039;Family 12h&#039;&#039;&#039; (also known as &#039;&#039;&#039;fam12h&#039;&#039;&#039;, or ambiguously as &#039;&#039;&#039;fam12&#039;&#039;&#039;) is a [[CPU Families Overview|family of AMD microprocessors]] corresponding to the [[K10|K10 microarchitecure]]. However, the K10 microarchitecture is additionally used in the [[Family 10h]] dies.&lt;br /&gt;
&lt;br /&gt;
&amp;quot;12h&amp;quot; (12-hexadecimal) is most correctly pronounced as &amp;quot;one-sixteen two&amp;quot;, but most people say &amp;quot;twelve‑aitch&amp;quot;.&lt;br /&gt;
&lt;br /&gt;
== Overview ==&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;text-align:center;&amp;quot;&lt;br /&gt;
|+&lt;br /&gt;
!&lt;br /&gt;
!K10&lt;br /&gt;
|-&lt;br /&gt;
!&lt;br /&gt;
!Llano&lt;br /&gt;
|-&lt;br /&gt;
|Release Date&lt;br /&gt;
|2011/08&lt;br /&gt;
|-&lt;br /&gt;
|[[AGESA]]&lt;br /&gt;
|[http://review.coreboot.org/40 Open Source]&lt;br /&gt;
|-&lt;br /&gt;
|BKDG&lt;br /&gt;
|[https://15h.org/images/6/64/12h_bkdg_pub_-_BIOS_and_Kernel_Developer%27s_Guide_for_AMD_Family_12h_Processors.pdf 41131]&lt;br /&gt;
|-&lt;br /&gt;
|coreboot&lt;br /&gt;
| style=&amp;quot;background-color:#FAA&amp;quot; | No&lt;br /&gt;
|-&lt;br /&gt;
|Microcode ROM&lt;br /&gt;
|Undocumented&lt;br /&gt;
|-&lt;br /&gt;
|Microcode Patches&lt;br /&gt;
|Unencrypted&lt;br /&gt;
|-&lt;br /&gt;
|[[PSP]]&lt;br /&gt;
|No&lt;br /&gt;
|}&lt;br /&gt;
&#039;&#039;For other CPU families besides Family 12h, see [[CPU Families Overview]]&#039;&#039;&lt;br /&gt;
&lt;br /&gt;
== See Also ==&lt;br /&gt;
&lt;br /&gt;
* [[CPU Families Overview]]&lt;br /&gt;
* [[K10]]&lt;br /&gt;
* [[AMD Codenames]]&lt;br /&gt;
&lt;br /&gt;
== References ==&lt;br /&gt;
(2014 paper) Security Analysis of x86 Processor Microcode&lt;br /&gt;
&amp;lt;ref name=&amp;quot;Security-x86&amp;quot;&amp;gt;&lt;br /&gt;
    https://www.dcddcc.com/docs/2014_paper_microcode.pdf&amp;lt;/ref&amp;gt;&lt;br /&gt;
&lt;br /&gt;
(2017 paper) Reverse Engineering x86 Processor Microcode&lt;br /&gt;
&amp;lt;ref name=&amp;quot;ReverseEngineering-x86&amp;quot;&amp;gt;&lt;br /&gt;
    https://www.usenix.org/system/files/conference/usenixsecurity17/sec17-koppe.pdf&amp;lt;/ref&amp;gt;&lt;/div&gt;</summary>
		<author><name>Mrothfuss</name></author>
	</entry>
	<entry>
		<id>https://15h.org/index.php?title=Family_14h&amp;diff=2895</id>
		<title>Family 14h</title>
		<link rel="alternate" type="text/html" href="https://15h.org/index.php?title=Family_14h&amp;diff=2895"/>
		<updated>2026-05-23T16:44:02Z</updated>

		<summary type="html">&lt;p&gt;Mrothfuss: /* Overview */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{{Infobox cpu family&lt;br /&gt;
  |image = BobcatDie.jpg&lt;br /&gt;
  |image_size = 300&lt;br /&gt;
  |caption = The die of a [[Bobcat]] APU&lt;br /&gt;
  |introduced = 2011&lt;br /&gt;
  |processnode = 40 nm&lt;br /&gt;
  |uarch1 = [[Bobcat]]&lt;br /&gt;
  |successor = [[Family 16h]]&lt;br /&gt;
}}&lt;br /&gt;
&lt;br /&gt;
&#039;&#039;&#039;Family 14h&#039;&#039;&#039; (also known as &#039;&#039;&#039;fam14h&#039;&#039;&#039;, or ambiguously as &#039;&#039;&#039;fam14&#039;&#039;&#039;) is a [[CPU Families Overview|family of AMD microprocessors]] corresponding to the [[Bobcat]] microarchitecture. All Family 16h processors were APUs, combining a CPU and a &amp;quot;fast-by-integrated-standards&amp;quot; GPU on a single die.&lt;br /&gt;
&lt;br /&gt;
&amp;quot;14h&amp;quot; (14-hexadecimal) is most correctly pronounced as &amp;quot;one-sixteen four&amp;quot;, but most people say &amp;quot;fourteen‑aitch&amp;quot;.&lt;br /&gt;
&lt;br /&gt;
Like other AMD family names, 14h (&amp;quot;14 hexadecimal&amp;quot;) is a mostly-arbitrary, somewhat-sequential (new processor families receive unused higher family numbers) number, returned by the x86 &amp;lt;code&amp;gt;CPUID&amp;lt;/code&amp;gt; instruction as a &amp;quot;Family number&amp;quot;, and commonly written in hexadecimal. 14 in hexadecimal corresponds to the number 20 in decimal, meaning that while &amp;quot;Family 20&amp;quot; would also be a valid, if confusing, name for these CPUs, &amp;quot;Family 14&amp;quot; could also refer to the apparently-nonexistent Family 0Eh.&lt;br /&gt;
&lt;br /&gt;
== Overview ==&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;text-align:center;&amp;quot;&lt;br /&gt;
|+&lt;br /&gt;
!&lt;br /&gt;
!Bobcat&lt;br /&gt;
|-&lt;br /&gt;
!&lt;br /&gt;
!Ontario&lt;br /&gt;
|-&lt;br /&gt;
|Models&lt;br /&gt;
|00h-0Fh&lt;br /&gt;
|-&lt;br /&gt;
|Release Date&lt;br /&gt;
|2011/01&lt;br /&gt;
|-&lt;br /&gt;
|[[AGESA]]&lt;br /&gt;
|[https://github.com/coreboot/coreboot/commit/2b4c831b4d16b55a7abdea20bce82cccd168232c Open Source]&lt;br /&gt;
|-&lt;br /&gt;
|BKDG&lt;br /&gt;
|[https://15h.org/images/3/3d/43170_14h_Mod_00h-0Fh_BKDG_-_BIOS_and_Kernel_Developer%E2%80%99s_Guide_%28BKDG%29_for_AMD_Family_14h_Models_00h-0Fh_Processors.pdf 43170]&lt;br /&gt;
|-&lt;br /&gt;
|coreboot&lt;br /&gt;
| style=&amp;quot;background-color:#AFA&amp;quot; | [[Family_14h#coreboot_Compatible_Motherboards|Yes]]&lt;br /&gt;
|-&lt;br /&gt;
|Microcode ROM&lt;br /&gt;
|Undocumented&lt;br /&gt;
|-&lt;br /&gt;
|Microcode Patches&lt;br /&gt;
|Unencrypted&lt;br /&gt;
|-&lt;br /&gt;
|[[PSP]]&lt;br /&gt;
|No&lt;br /&gt;
|}&lt;br /&gt;
&#039;&#039;For other CPU families besides Family 14h, see [[CPU Families Overview]]&#039;&#039;&lt;br /&gt;
&lt;br /&gt;
== coreboot Compatible Motherboards ==&lt;br /&gt;
=== Bobcat ===&lt;br /&gt;
* Socket [[FT1]]&lt;br /&gt;
** [[PC Engines APU1]]&lt;br /&gt;
&lt;br /&gt;
== See Also ==&lt;br /&gt;
&lt;br /&gt;
* [[CPU Families Overview]]&lt;br /&gt;
* [[AMD Codenames]]&lt;br /&gt;
&lt;br /&gt;
== References ==&lt;/div&gt;</summary>
		<author><name>Mrothfuss</name></author>
	</entry>
	<entry>
		<id>https://15h.org/index.php?title=Family_16h&amp;diff=2894</id>
		<title>Family 16h</title>
		<link rel="alternate" type="text/html" href="https://15h.org/index.php?title=Family_16h&amp;diff=2894"/>
		<updated>2026-05-23T16:43:39Z</updated>

		<summary type="html">&lt;p&gt;Mrothfuss: /* Overview */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{{Infobox cpu family&lt;br /&gt;
  |image = JaguarDieshotFromPS4.jpg&lt;br /&gt;
  |image_size = 300&lt;br /&gt;
  |caption = The die from the [[Jaguar]] APU used in the PlayStation 4&lt;br /&gt;
  |introduced = 2013&lt;br /&gt;
  |processnode = 28nm, except 16nm in some game consoles&lt;br /&gt;
  |uarch1 = [[Jaguar]]&lt;br /&gt;
  |uarch2 = [[Puma]]&lt;br /&gt;
  |predecessor = [[Family 15h]]&lt;br /&gt;
  |successor = Zen APUs&lt;br /&gt;
}}&lt;br /&gt;
&lt;br /&gt;
&#039;&#039;&#039;Family 16h&#039;&#039;&#039; (also known as &#039;&#039;&#039;fam16h&#039;&#039;&#039;, or ambiguously as &#039;&#039;&#039;fam16&#039;&#039;&#039;) is a [[CPU Families Overview|family of AMD microprocessors]] corresponding to the [[Jaguar]] and [[Puma]] microarchitectures. All Family 16h processors were APUs, combining a CPU and a &amp;quot;fast-by-integrated-standards&amp;quot; GPU on a single die. Outside the PC hardware space, it is notable for use in the Xbox One and PlayStation 4 families of eighth-generation game consoles.&lt;br /&gt;
&lt;br /&gt;
&amp;quot;16h&amp;quot; (16-hexadecimal) is most correctly pronounced as &amp;quot;one-sixteen six&amp;quot;, but most people say &amp;quot;sixteen‑aitch&amp;quot;.&lt;br /&gt;
&lt;br /&gt;
Like other AMD family names, 16h (&amp;quot;16 hexadecimal&amp;quot;) is a mostly-arbitrary, somewhat-sequential (new processor families receive unused higher family numbers) number, returned by the x86 &amp;lt;code&amp;gt;CPUID&amp;lt;/code&amp;gt; instruction as a &amp;quot;Family number&amp;quot;, and commonly written in hexadecimal. 16 in hexadecimal corresponds to the number 22 in decimal, meaning that while &amp;quot;Family 22&amp;quot; would also be a valid, if confusing, name for these CPUs, &amp;quot;Family 16&amp;quot; could also refer to [[Family 10h]].&lt;br /&gt;
&lt;br /&gt;
== Overview ==&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;text-align:center;&amp;quot;&lt;br /&gt;
|+&lt;br /&gt;
!&lt;br /&gt;
!Jaguar&lt;br /&gt;
!Puma&lt;br /&gt;
|-&lt;br /&gt;
!&lt;br /&gt;
!Kabini&lt;br /&gt;
!Mullins&lt;br /&gt;
|-&lt;br /&gt;
|Models&lt;br /&gt;
|00h-0Fh&lt;br /&gt;
|30h-3Fh&lt;br /&gt;
|-&lt;br /&gt;
|Release Date&lt;br /&gt;
|2013/05&lt;br /&gt;
|2014/04&lt;br /&gt;
|-&lt;br /&gt;
|[[AGESA]]&lt;br /&gt;
|[http://review.coreboot.org/3836 Open Source]&lt;br /&gt;
|Closed Source&lt;br /&gt;
|-&lt;br /&gt;
|BKDG&lt;br /&gt;
|[https://15h.org/images/4/4a/48751_16h_bkdg_-_BIOS_and_Kernel_Developer%E2%80%99s_Guide_%28BKDG%29_for_AMD_Family_16h_Models_00h-0Fh_Processors.pdf 48751]&lt;br /&gt;
|[https://15h.org/images/6/61/52740_16h_Models_30h-3Fh_BKDG.pdf 52740]&lt;br /&gt;
|-&lt;br /&gt;
|coreboot&lt;br /&gt;
| style=&amp;quot;background-color:#AFA&amp;quot; | [[Family_16h#Jaguar|Yes]]&lt;br /&gt;
| style=&amp;quot;background-color:#AFA&amp;quot; | [[Family_16h#Puma|Yes]]&lt;br /&gt;
|-&lt;br /&gt;
|Microcode ROM&lt;br /&gt;
| colspan=&amp;quot;2&amp;quot; |Undocumented&lt;br /&gt;
|-&lt;br /&gt;
|Microcode Patches&lt;br /&gt;
|Unencrypted&lt;br /&gt;
|TBD&lt;br /&gt;
|-&lt;br /&gt;
|[[PSP]]&lt;br /&gt;
|No&lt;br /&gt;
|Online&lt;br /&gt;
|}&lt;br /&gt;
&#039;&#039;For other CPU families besides Family 16h, see [[CPU Families Overview]]&#039;&#039;&lt;br /&gt;
&lt;br /&gt;
== coreboot Compatible Motherboards ==&lt;br /&gt;
=== Jaguar ===&lt;br /&gt;
* Socket [[FT3]]&lt;br /&gt;
** [[Lenovo ThinkPad X140e]] (laptop)&lt;br /&gt;
* Socket [[AM1]]&lt;br /&gt;
** [[AM1I-A|ASUS AM1I-A]] (mini-ITX)&lt;br /&gt;
=== Puma ===&lt;br /&gt;
* Socket [[FT3b]]&lt;br /&gt;
** [[PC Engines APU2]]&lt;br /&gt;
&lt;br /&gt;
== See Also ==&lt;br /&gt;
&lt;br /&gt;
* [[AMD Codenames]]&lt;/div&gt;</summary>
		<author><name>Mrothfuss</name></author>
	</entry>
	<entry>
		<id>https://15h.org/index.php?title=Family_12h&amp;diff=2893</id>
		<title>Family 12h</title>
		<link rel="alternate" type="text/html" href="https://15h.org/index.php?title=Family_12h&amp;diff=2893"/>
		<updated>2026-05-23T16:40:40Z</updated>

		<summary type="html">&lt;p&gt;Mrothfuss: /* Overview */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;&lt;br /&gt;
&#039;&#039;&#039;Family 12h&#039;&#039;&#039; (also known as &#039;&#039;&#039;fam12h&#039;&#039;&#039;, or ambiguously as &#039;&#039;&#039;fam12&#039;&#039;&#039;) is a [[CPU Families Overview|family of AMD microprocessors]] corresponding to the [[K10|K10 microarchitecure]]. However, the K10 microarchitecture is additionally used in the [[Family 10h]] dies.&lt;br /&gt;
&lt;br /&gt;
&amp;quot;12h&amp;quot; (12-hexadecimal) is most correctly pronounced as &amp;quot;one-sixteen two&amp;quot;, but most people say &amp;quot;twelve‑aitch&amp;quot;.&lt;br /&gt;
&lt;br /&gt;
== Overview ==&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;text-align:center;&amp;quot;&lt;br /&gt;
|+&lt;br /&gt;
!&lt;br /&gt;
!K10&lt;br /&gt;
|-&lt;br /&gt;
!&lt;br /&gt;
!Llano&lt;br /&gt;
|-&lt;br /&gt;
|Release Date&lt;br /&gt;
|2011&lt;br /&gt;
|-&lt;br /&gt;
|[[AGESA]]&lt;br /&gt;
|[http://review.coreboot.org/40 Open Source]&lt;br /&gt;
|-&lt;br /&gt;
|BKDG&lt;br /&gt;
|[https://15h.org/images/6/64/12h_bkdg_pub_-_BIOS_and_Kernel_Developer%27s_Guide_for_AMD_Family_12h_Processors.pdf 41131]&lt;br /&gt;
|-&lt;br /&gt;
|coreboot&lt;br /&gt;
| style=&amp;quot;background-color:#FAA&amp;quot; | No&lt;br /&gt;
|-&lt;br /&gt;
|Microcode ROM&lt;br /&gt;
|Undocumented&lt;br /&gt;
|-&lt;br /&gt;
|Microcode Patches&lt;br /&gt;
|Unencrypted&lt;br /&gt;
|-&lt;br /&gt;
|[[PSP]]&lt;br /&gt;
|No&lt;br /&gt;
|}&lt;br /&gt;
&#039;&#039;For other CPU families besides Family 12h, see [[CPU Families Overview]]&#039;&#039;&lt;br /&gt;
&lt;br /&gt;
== See Also ==&lt;br /&gt;
&lt;br /&gt;
* [[CPU Families Overview]]&lt;br /&gt;
* [[K10]]&lt;br /&gt;
* [[AMD Codenames]]&lt;br /&gt;
&lt;br /&gt;
== References ==&lt;br /&gt;
(2014 paper) Security Analysis of x86 Processor Microcode&lt;br /&gt;
&amp;lt;ref name=&amp;quot;Security-x86&amp;quot;&amp;gt;&lt;br /&gt;
    https://www.dcddcc.com/docs/2014_paper_microcode.pdf&amp;lt;/ref&amp;gt;&lt;br /&gt;
&lt;br /&gt;
(2017 paper) Reverse Engineering x86 Processor Microcode&lt;br /&gt;
&amp;lt;ref name=&amp;quot;ReverseEngineering-x86&amp;quot;&amp;gt;&lt;br /&gt;
    https://www.usenix.org/system/files/conference/usenixsecurity17/sec17-koppe.pdf&amp;lt;/ref&amp;gt;&lt;/div&gt;</summary>
		<author><name>Mrothfuss</name></author>
	</entry>
	<entry>
		<id>https://15h.org/index.php?title=Family_14h&amp;diff=2892</id>
		<title>Family 14h</title>
		<link rel="alternate" type="text/html" href="https://15h.org/index.php?title=Family_14h&amp;diff=2892"/>
		<updated>2026-05-23T16:38:42Z</updated>

		<summary type="html">&lt;p&gt;Mrothfuss: /* Overview */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{{Infobox cpu family&lt;br /&gt;
  |image = BobcatDie.jpg&lt;br /&gt;
  |image_size = 300&lt;br /&gt;
  |caption = The die of a [[Bobcat]] APU&lt;br /&gt;
  |introduced = 2011&lt;br /&gt;
  |processnode = 40 nm&lt;br /&gt;
  |uarch1 = [[Bobcat]]&lt;br /&gt;
  |successor = [[Family 16h]]&lt;br /&gt;
}}&lt;br /&gt;
&lt;br /&gt;
&#039;&#039;&#039;Family 14h&#039;&#039;&#039; (also known as &#039;&#039;&#039;fam14h&#039;&#039;&#039;, or ambiguously as &#039;&#039;&#039;fam14&#039;&#039;&#039;) is a [[CPU Families Overview|family of AMD microprocessors]] corresponding to the [[Bobcat]] microarchitecture. All Family 16h processors were APUs, combining a CPU and a &amp;quot;fast-by-integrated-standards&amp;quot; GPU on a single die.&lt;br /&gt;
&lt;br /&gt;
&amp;quot;14h&amp;quot; (14-hexadecimal) is most correctly pronounced as &amp;quot;one-sixteen four&amp;quot;, but most people say &amp;quot;fourteen‑aitch&amp;quot;.&lt;br /&gt;
&lt;br /&gt;
Like other AMD family names, 14h (&amp;quot;14 hexadecimal&amp;quot;) is a mostly-arbitrary, somewhat-sequential (new processor families receive unused higher family numbers) number, returned by the x86 &amp;lt;code&amp;gt;CPUID&amp;lt;/code&amp;gt; instruction as a &amp;quot;Family number&amp;quot;, and commonly written in hexadecimal. 14 in hexadecimal corresponds to the number 20 in decimal, meaning that while &amp;quot;Family 20&amp;quot; would also be a valid, if confusing, name for these CPUs, &amp;quot;Family 14&amp;quot; could also refer to the apparently-nonexistent Family 0Eh.&lt;br /&gt;
&lt;br /&gt;
== Overview ==&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;text-align:center;&amp;quot;&lt;br /&gt;
|+&lt;br /&gt;
!&lt;br /&gt;
!Bobcat&lt;br /&gt;
|-&lt;br /&gt;
!&lt;br /&gt;
!Ontario&lt;br /&gt;
|-&lt;br /&gt;
|Models&lt;br /&gt;
|00h-0Fh&lt;br /&gt;
|-&lt;br /&gt;
|Release Date&lt;br /&gt;
|2011&lt;br /&gt;
|-&lt;br /&gt;
|[[AGESA]]&lt;br /&gt;
|[https://github.com/coreboot/coreboot/commit/2b4c831b4d16b55a7abdea20bce82cccd168232c Open Source]&lt;br /&gt;
|-&lt;br /&gt;
|BKDG&lt;br /&gt;
|[https://15h.org/images/3/3d/43170_14h_Mod_00h-0Fh_BKDG_-_BIOS_and_Kernel_Developer%E2%80%99s_Guide_%28BKDG%29_for_AMD_Family_14h_Models_00h-0Fh_Processors.pdf 43170]&lt;br /&gt;
|-&lt;br /&gt;
|coreboot&lt;br /&gt;
| style=&amp;quot;background-color:#AFA&amp;quot; | [[Family_14h#coreboot_Compatible_Motherboards|Yes]]&lt;br /&gt;
|-&lt;br /&gt;
|Microcode ROM&lt;br /&gt;
|Undocumented&lt;br /&gt;
|-&lt;br /&gt;
|Microcode Patches&lt;br /&gt;
|Unencrypted&lt;br /&gt;
|-&lt;br /&gt;
|[[PSP]]&lt;br /&gt;
|No&lt;br /&gt;
|}&lt;br /&gt;
&#039;&#039;For other CPU families besides Family 14h, see [[CPU Families Overview]]&#039;&#039;&lt;br /&gt;
&lt;br /&gt;
== coreboot Compatible Motherboards ==&lt;br /&gt;
=== Bobcat ===&lt;br /&gt;
* Socket [[FT1]]&lt;br /&gt;
** [[PC Engines APU1]]&lt;br /&gt;
&lt;br /&gt;
== See Also ==&lt;br /&gt;
&lt;br /&gt;
* [[CPU Families Overview]]&lt;br /&gt;
* [[AMD Codenames]]&lt;br /&gt;
&lt;br /&gt;
== References ==&lt;/div&gt;</summary>
		<author><name>Mrothfuss</name></author>
	</entry>
	<entry>
		<id>https://15h.org/index.php?title=AMD_Codenames&amp;diff=2891</id>
		<title>AMD Codenames</title>
		<link rel="alternate" type="text/html" href="https://15h.org/index.php?title=AMD_Codenames&amp;diff=2891"/>
		<updated>2026-05-23T16:37:51Z</updated>

		<summary type="html">&lt;p&gt;Mrothfuss: /* AMD 15h Excavator CPUs */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;This is an incomplete list of AMD Codenames.&lt;br /&gt;
&lt;br /&gt;
== AMD Platforms ==&lt;br /&gt;
* &#039;&#039;&#039;Scorpius&#039;&#039;&#039;, K10/Bulldozer/Piledriver Socket AM3 and AM3+ Platforms&lt;br /&gt;
* &#039;&#039;&#039;SanMarino&#039;&#039;&#039;, K10/Bulldozer/Piledriver Socket C32 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Maranello&#039;&#039;&#039;, K10/Bulldozer/Piledriver Socket G34 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Comal&#039;&#039;&#039;, Trinity Socket FS1 and FP2 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Virgo&#039;&#039;&#039;, Trinity Socket FM2 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Kerala&#039;&#039;&#039;, Kabini Socket FT3 Platforms&lt;br /&gt;
&lt;br /&gt;
== AMD 10h K10 CPUs ==&lt;br /&gt;
* [[K10|Detailed article]]&lt;br /&gt;
&lt;br /&gt;
=== DR, DeerHound ===&lt;br /&gt;
* [[K10 dies 65 nm|article: K10 dies 65 nm]]&lt;br /&gt;
==== Socket AM2+ ====&lt;br /&gt;
* Athlon X2 &amp;quot;Kuma&amp;quot;&lt;br /&gt;
* Phenom X3 &amp;quot;Toliman&amp;quot;&lt;br /&gt;
* Phenom X4 &amp;quot;Agena&amp;quot;&lt;br /&gt;
* Opteron 1300 &amp;quot;Budapest&amp;quot;&lt;br /&gt;
==== Socket Fr2 ====&lt;br /&gt;
* Opteron 2300/8300 &amp;quot;Barcelona&amp;quot;&lt;br /&gt;
&lt;br /&gt;
=== RB, RidgeBack ===&lt;br /&gt;
* [[K10 dies 45 nm|article: K10 dies 45 nm]]&lt;br /&gt;
==== Socket AM2+ ====&lt;br /&gt;
* Athlon X2&lt;br /&gt;
* Phenom II X3/X4&lt;br /&gt;
==== Socket AM3 ====&lt;br /&gt;
* Phenom II XLT (embedded)&lt;br /&gt;
* Phenom II X2/X3/X4&lt;br /&gt;
* Opteron 1300 &amp;quot;Suzuka&amp;quot;&lt;br /&gt;
==== Socket Fr2/Fr5 ====&lt;br /&gt;
* Opteron 2300/8300 &amp;quot;Shanghai&amp;quot; &lt;br /&gt;
=== BL ===&lt;br /&gt;
* [[K10 dies 45 nm|article: K10 dies 45 nm]]&lt;br /&gt;
==== Socket AM3 ====&lt;br /&gt;
* Athlon II X2/X3/X4&lt;br /&gt;
=== DA, Danube ===&lt;br /&gt;
* [[K10 dies 45 nm|article: K10 dies 45 nm]]&lt;br /&gt;
==== Socket ASB2 ====&lt;br /&gt;
* V-Series &lt;br /&gt;
* Athlon II Neo N/K/R&lt;br /&gt;
* Turion II Neo N/K &amp;quot;Geneva&amp;quot;&lt;br /&gt;
==== Socket S1g3/S1g4 ====&lt;br /&gt;
* Turion II M500 &lt;br /&gt;
* Turion II Ultra M600 &amp;quot;Caspian&amp;quot;&lt;br /&gt;
* V-Series&lt;br /&gt;
* Sempron M100&lt;br /&gt;
* Athlon II M300&lt;br /&gt;
* Phenom II N/P/X&lt;br /&gt;
==== Socket AM3 ====&lt;br /&gt;
* Sempron&lt;br /&gt;
* Sempron X2&lt;br /&gt;
* Athlon II XL &amp;amp; XLT (embedded)&lt;br /&gt;
* Athlon II&lt;br /&gt;
* Athlon II X2&lt;br /&gt;
=== HY, Hydra ===&lt;br /&gt;
* [[K10 dies 45 nm|article: K10 dies 45 nm]]&lt;br /&gt;
==== Socket Fr6 ====&lt;br /&gt;
* Opteron 2400/8400 &amp;quot;Istanbul&amp;quot;&lt;br /&gt;
==== Socket C32 ====&lt;br /&gt;
* Opteron 4100 &amp;quot;Lisbon&amp;quot;&lt;br /&gt;
==== Socket G34 ====&lt;br /&gt;
* Opteron 6100 &amp;quot;Magny Cours&amp;quot;&lt;br /&gt;
=== PH, Pharaoh Hound ===&lt;br /&gt;
* [[K10 dies 45 nm|article: K10 dies 45 nm]]&lt;br /&gt;
==== Socket AM3 ====&lt;br /&gt;
* Athlon II X4&lt;br /&gt;
* Phenom II X4 &amp;quot;Zosma&amp;quot;&lt;br /&gt;
* Phenom II X6 &amp;quot;Thuban&amp;quot;&lt;br /&gt;
== AMD 12h K10 CPUs ==&lt;br /&gt;
[[K10 dies 32 nm|detailed article (TO DO)]]&lt;br /&gt;
=== LN, Llano ===&lt;br /&gt;
==== Socket FM1 ====&lt;br /&gt;
* A4, A6, A8 3000 Series&lt;br /&gt;
* Athlon II X4 600 Series&lt;br /&gt;
* E2-3200&lt;br /&gt;
==== Socket FS1 ====&lt;br /&gt;
* A4, A6, A8 3000 Series (Mobile)&lt;br /&gt;
* E2-3000M&lt;br /&gt;
== AMD 14h Bobcat CPUs ==&lt;br /&gt;
=== ON, Ontario ===&lt;br /&gt;
==== Socket FT1 ====&lt;br /&gt;
* C-30, C-50, C-60, C-70&lt;br /&gt;
=== ??, Zacate ===&lt;br /&gt;
=== ??, Desna ===&lt;br /&gt;
== AMD 15h Bulldozer CPUs ==&lt;br /&gt;
=== OR, Orochi ===&lt;br /&gt;
==== Socket AM3+ ====&lt;br /&gt;
* AMD FX &amp;quot;Zambezi&amp;quot;&lt;br /&gt;
* Opteron 3200 &amp;quot;Zurich&amp;quot;&lt;br /&gt;
==== Socket C32 ====&lt;br /&gt;
* Opteron 4200 &amp;quot;Valencia&amp;quot;&lt;br /&gt;
==== Socket G34 ====&lt;br /&gt;
* Opteron 6200 &amp;quot;Interlagos&amp;quot;&lt;br /&gt;
== AMD 15h Piledriver CPUs ==&lt;br /&gt;
=== OR, Orochi ===&lt;br /&gt;
==== Socket AM3+ ====&lt;br /&gt;
* AMD FX &amp;quot;Vishera&amp;quot;&lt;br /&gt;
* Opteron 3300 &amp;quot;Delhi&amp;quot;&lt;br /&gt;
==== Socket C32 ====&lt;br /&gt;
* Opteron 4300 &amp;quot;Seoul&amp;quot;&lt;br /&gt;
==== Socket G34 ====&lt;br /&gt;
* Opteron 6300 &amp;quot;Abu Dhabi&amp;quot; and &amp;quot;Warsaw&amp;quot;&lt;br /&gt;
=== TN, Trinity ===&lt;br /&gt;
==== Socket FM2 ====&lt;br /&gt;
* A4, A6, A8, A10 5000 Series&lt;br /&gt;
* Sempron X2 240&lt;br /&gt;
* Athlon X2 340&lt;br /&gt;
* Athlon X4 730, 740, 750K&lt;br /&gt;
* FirePro A300, A320&lt;br /&gt;
==== Socket FP2 ====&lt;br /&gt;
* A4, A6, A8, A10 4000 Series (Mobile)&lt;br /&gt;
==== Socket FS1r2 ====&lt;br /&gt;
* A4, A6, A8, A10 4000 Series (Mobile)&lt;br /&gt;
=== RL, Richland ===&lt;br /&gt;
==== Socket FM2 ====&lt;br /&gt;
* A4, A6, A8, A10 6000 Series&lt;br /&gt;
* A4 PRO-7300B&lt;br /&gt;
* Athlon X4 750, 760K&lt;br /&gt;
==== Socket FP2 ====&lt;br /&gt;
* A4, A6, A8, A10 5000 Series (Mobile)&lt;br /&gt;
==== Socket FS1r2 ====&lt;br /&gt;
* A4, A6, A8, A10 5000 Series (Mobile)&lt;br /&gt;
=== KM, Komodo ===&lt;br /&gt;
==== Socket FM2 ====&lt;br /&gt;
* Canceled&lt;br /&gt;
== AMD 15h Steamroller CPUs ==&lt;br /&gt;
=== KV, Kaveri ===&lt;br /&gt;
=== GV, Godavari ===&lt;br /&gt;
&lt;br /&gt;
== AMD 15h Excavator CPUs ==&lt;br /&gt;
=== CZ, Carrizo ===&lt;br /&gt;
=== BR, Bristol Ridge ===&lt;br /&gt;
=== ST, Stoney Ridge ===&lt;br /&gt;
&lt;br /&gt;
== AMD 16h Jaguar CPUs ==&lt;br /&gt;
=== KB, Kabini ===&lt;br /&gt;
==== Socket AM1 ====&lt;br /&gt;
==== Socket FT3 ====&lt;br /&gt;
== AMD 16h Puma CPUs ==&lt;br /&gt;
=== ML, Mullins ===&lt;br /&gt;
==== Socket AM1 ====&lt;br /&gt;
==== Socket FT3b ====&lt;/div&gt;</summary>
		<author><name>Mrothfuss</name></author>
	</entry>
	<entry>
		<id>https://15h.org/index.php?title=AMD_Codenames&amp;diff=2890</id>
		<title>AMD Codenames</title>
		<link rel="alternate" type="text/html" href="https://15h.org/index.php?title=AMD_Codenames&amp;diff=2890"/>
		<updated>2026-05-23T16:37:46Z</updated>

		<summary type="html">&lt;p&gt;Mrothfuss: /* AMD 15h Steamroller CPUs */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;This is an incomplete list of AMD Codenames.&lt;br /&gt;
&lt;br /&gt;
== AMD Platforms ==&lt;br /&gt;
* &#039;&#039;&#039;Scorpius&#039;&#039;&#039;, K10/Bulldozer/Piledriver Socket AM3 and AM3+ Platforms&lt;br /&gt;
* &#039;&#039;&#039;SanMarino&#039;&#039;&#039;, K10/Bulldozer/Piledriver Socket C32 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Maranello&#039;&#039;&#039;, K10/Bulldozer/Piledriver Socket G34 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Comal&#039;&#039;&#039;, Trinity Socket FS1 and FP2 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Virgo&#039;&#039;&#039;, Trinity Socket FM2 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Kerala&#039;&#039;&#039;, Kabini Socket FT3 Platforms&lt;br /&gt;
&lt;br /&gt;
== AMD 10h K10 CPUs ==&lt;br /&gt;
* [[K10|Detailed article]]&lt;br /&gt;
&lt;br /&gt;
=== DR, DeerHound ===&lt;br /&gt;
* [[K10 dies 65 nm|article: K10 dies 65 nm]]&lt;br /&gt;
==== Socket AM2+ ====&lt;br /&gt;
* Athlon X2 &amp;quot;Kuma&amp;quot;&lt;br /&gt;
* Phenom X3 &amp;quot;Toliman&amp;quot;&lt;br /&gt;
* Phenom X4 &amp;quot;Agena&amp;quot;&lt;br /&gt;
* Opteron 1300 &amp;quot;Budapest&amp;quot;&lt;br /&gt;
==== Socket Fr2 ====&lt;br /&gt;
* Opteron 2300/8300 &amp;quot;Barcelona&amp;quot;&lt;br /&gt;
&lt;br /&gt;
=== RB, RidgeBack ===&lt;br /&gt;
* [[K10 dies 45 nm|article: K10 dies 45 nm]]&lt;br /&gt;
==== Socket AM2+ ====&lt;br /&gt;
* Athlon X2&lt;br /&gt;
* Phenom II X3/X4&lt;br /&gt;
==== Socket AM3 ====&lt;br /&gt;
* Phenom II XLT (embedded)&lt;br /&gt;
* Phenom II X2/X3/X4&lt;br /&gt;
* Opteron 1300 &amp;quot;Suzuka&amp;quot;&lt;br /&gt;
==== Socket Fr2/Fr5 ====&lt;br /&gt;
* Opteron 2300/8300 &amp;quot;Shanghai&amp;quot; &lt;br /&gt;
=== BL ===&lt;br /&gt;
* [[K10 dies 45 nm|article: K10 dies 45 nm]]&lt;br /&gt;
==== Socket AM3 ====&lt;br /&gt;
* Athlon II X2/X3/X4&lt;br /&gt;
=== DA, Danube ===&lt;br /&gt;
* [[K10 dies 45 nm|article: K10 dies 45 nm]]&lt;br /&gt;
==== Socket ASB2 ====&lt;br /&gt;
* V-Series &lt;br /&gt;
* Athlon II Neo N/K/R&lt;br /&gt;
* Turion II Neo N/K &amp;quot;Geneva&amp;quot;&lt;br /&gt;
==== Socket S1g3/S1g4 ====&lt;br /&gt;
* Turion II M500 &lt;br /&gt;
* Turion II Ultra M600 &amp;quot;Caspian&amp;quot;&lt;br /&gt;
* V-Series&lt;br /&gt;
* Sempron M100&lt;br /&gt;
* Athlon II M300&lt;br /&gt;
* Phenom II N/P/X&lt;br /&gt;
==== Socket AM3 ====&lt;br /&gt;
* Sempron&lt;br /&gt;
* Sempron X2&lt;br /&gt;
* Athlon II XL &amp;amp; XLT (embedded)&lt;br /&gt;
* Athlon II&lt;br /&gt;
* Athlon II X2&lt;br /&gt;
=== HY, Hydra ===&lt;br /&gt;
* [[K10 dies 45 nm|article: K10 dies 45 nm]]&lt;br /&gt;
==== Socket Fr6 ====&lt;br /&gt;
* Opteron 2400/8400 &amp;quot;Istanbul&amp;quot;&lt;br /&gt;
==== Socket C32 ====&lt;br /&gt;
* Opteron 4100 &amp;quot;Lisbon&amp;quot;&lt;br /&gt;
==== Socket G34 ====&lt;br /&gt;
* Opteron 6100 &amp;quot;Magny Cours&amp;quot;&lt;br /&gt;
=== PH, Pharaoh Hound ===&lt;br /&gt;
* [[K10 dies 45 nm|article: K10 dies 45 nm]]&lt;br /&gt;
==== Socket AM3 ====&lt;br /&gt;
* Athlon II X4&lt;br /&gt;
* Phenom II X4 &amp;quot;Zosma&amp;quot;&lt;br /&gt;
* Phenom II X6 &amp;quot;Thuban&amp;quot;&lt;br /&gt;
== AMD 12h K10 CPUs ==&lt;br /&gt;
[[K10 dies 32 nm|detailed article (TO DO)]]&lt;br /&gt;
=== LN, Llano ===&lt;br /&gt;
==== Socket FM1 ====&lt;br /&gt;
* A4, A6, A8 3000 Series&lt;br /&gt;
* Athlon II X4 600 Series&lt;br /&gt;
* E2-3200&lt;br /&gt;
==== Socket FS1 ====&lt;br /&gt;
* A4, A6, A8 3000 Series (Mobile)&lt;br /&gt;
* E2-3000M&lt;br /&gt;
== AMD 14h Bobcat CPUs ==&lt;br /&gt;
=== ON, Ontario ===&lt;br /&gt;
==== Socket FT1 ====&lt;br /&gt;
* C-30, C-50, C-60, C-70&lt;br /&gt;
=== ??, Zacate ===&lt;br /&gt;
=== ??, Desna ===&lt;br /&gt;
== AMD 15h Bulldozer CPUs ==&lt;br /&gt;
=== OR, Orochi ===&lt;br /&gt;
==== Socket AM3+ ====&lt;br /&gt;
* AMD FX &amp;quot;Zambezi&amp;quot;&lt;br /&gt;
* Opteron 3200 &amp;quot;Zurich&amp;quot;&lt;br /&gt;
==== Socket C32 ====&lt;br /&gt;
* Opteron 4200 &amp;quot;Valencia&amp;quot;&lt;br /&gt;
==== Socket G34 ====&lt;br /&gt;
* Opteron 6200 &amp;quot;Interlagos&amp;quot;&lt;br /&gt;
== AMD 15h Piledriver CPUs ==&lt;br /&gt;
=== OR, Orochi ===&lt;br /&gt;
==== Socket AM3+ ====&lt;br /&gt;
* AMD FX &amp;quot;Vishera&amp;quot;&lt;br /&gt;
* Opteron 3300 &amp;quot;Delhi&amp;quot;&lt;br /&gt;
==== Socket C32 ====&lt;br /&gt;
* Opteron 4300 &amp;quot;Seoul&amp;quot;&lt;br /&gt;
==== Socket G34 ====&lt;br /&gt;
* Opteron 6300 &amp;quot;Abu Dhabi&amp;quot; and &amp;quot;Warsaw&amp;quot;&lt;br /&gt;
=== TN, Trinity ===&lt;br /&gt;
==== Socket FM2 ====&lt;br /&gt;
* A4, A6, A8, A10 5000 Series&lt;br /&gt;
* Sempron X2 240&lt;br /&gt;
* Athlon X2 340&lt;br /&gt;
* Athlon X4 730, 740, 750K&lt;br /&gt;
* FirePro A300, A320&lt;br /&gt;
==== Socket FP2 ====&lt;br /&gt;
* A4, A6, A8, A10 4000 Series (Mobile)&lt;br /&gt;
==== Socket FS1r2 ====&lt;br /&gt;
* A4, A6, A8, A10 4000 Series (Mobile)&lt;br /&gt;
=== RL, Richland ===&lt;br /&gt;
==== Socket FM2 ====&lt;br /&gt;
* A4, A6, A8, A10 6000 Series&lt;br /&gt;
* A4 PRO-7300B&lt;br /&gt;
* Athlon X4 750, 760K&lt;br /&gt;
==== Socket FP2 ====&lt;br /&gt;
* A4, A6, A8, A10 5000 Series (Mobile)&lt;br /&gt;
==== Socket FS1r2 ====&lt;br /&gt;
* A4, A6, A8, A10 5000 Series (Mobile)&lt;br /&gt;
=== KM, Komodo ===&lt;br /&gt;
==== Socket FM2 ====&lt;br /&gt;
* Canceled&lt;br /&gt;
== AMD 15h Steamroller CPUs ==&lt;br /&gt;
=== KV, Kaveri ===&lt;br /&gt;
=== GV, Godavari ===&lt;br /&gt;
&lt;br /&gt;
== AMD 15h Excavator CPUs ==&lt;br /&gt;
=== CZ, Carrizo ===&lt;br /&gt;
=== BR, Bristol Ridge ===&lt;br /&gt;
=== ST, Stoney Ridge ===&lt;br /&gt;
=== ??, Brown Falcon ===&lt;br /&gt;
=== ??, Prairie Falcon ===&lt;br /&gt;
== AMD 16h Jaguar CPUs ==&lt;br /&gt;
=== KB, Kabini ===&lt;br /&gt;
==== Socket AM1 ====&lt;br /&gt;
==== Socket FT3 ====&lt;br /&gt;
== AMD 16h Puma CPUs ==&lt;br /&gt;
=== ML, Mullins ===&lt;br /&gt;
==== Socket AM1 ====&lt;br /&gt;
==== Socket FT3b ====&lt;/div&gt;</summary>
		<author><name>Mrothfuss</name></author>
	</entry>
	<entry>
		<id>https://15h.org/index.php?title=AMD_Codenames&amp;diff=2889</id>
		<title>AMD Codenames</title>
		<link rel="alternate" type="text/html" href="https://15h.org/index.php?title=AMD_Codenames&amp;diff=2889"/>
		<updated>2026-05-23T16:35:48Z</updated>

		<summary type="html">&lt;p&gt;Mrothfuss: /* AMD 16h Jaguar CPUs */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;This is an incomplete list of AMD Codenames.&lt;br /&gt;
&lt;br /&gt;
== AMD Platforms ==&lt;br /&gt;
* &#039;&#039;&#039;Scorpius&#039;&#039;&#039;, K10/Bulldozer/Piledriver Socket AM3 and AM3+ Platforms&lt;br /&gt;
* &#039;&#039;&#039;SanMarino&#039;&#039;&#039;, K10/Bulldozer/Piledriver Socket C32 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Maranello&#039;&#039;&#039;, K10/Bulldozer/Piledriver Socket G34 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Comal&#039;&#039;&#039;, Trinity Socket FS1 and FP2 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Virgo&#039;&#039;&#039;, Trinity Socket FM2 Platforms&lt;br /&gt;
* &#039;&#039;&#039;Kerala&#039;&#039;&#039;, Kabini Socket FT3 Platforms&lt;br /&gt;
&lt;br /&gt;
== AMD 10h K10 CPUs ==&lt;br /&gt;
* [[K10|Detailed article]]&lt;br /&gt;
&lt;br /&gt;
=== DR, DeerHound ===&lt;br /&gt;
* [[K10 dies 65 nm|article: K10 dies 65 nm]]&lt;br /&gt;
==== Socket AM2+ ====&lt;br /&gt;
* Athlon X2 &amp;quot;Kuma&amp;quot;&lt;br /&gt;
* Phenom X3 &amp;quot;Toliman&amp;quot;&lt;br /&gt;
* Phenom X4 &amp;quot;Agena&amp;quot;&lt;br /&gt;
* Opteron 1300 &amp;quot;Budapest&amp;quot;&lt;br /&gt;
==== Socket Fr2 ====&lt;br /&gt;
* Opteron 2300/8300 &amp;quot;Barcelona&amp;quot;&lt;br /&gt;
&lt;br /&gt;
=== RB, RidgeBack ===&lt;br /&gt;
* [[K10 dies 45 nm|article: K10 dies 45 nm]]&lt;br /&gt;
==== Socket AM2+ ====&lt;br /&gt;
* Athlon X2&lt;br /&gt;
* Phenom II X3/X4&lt;br /&gt;
==== Socket AM3 ====&lt;br /&gt;
* Phenom II XLT (embedded)&lt;br /&gt;
* Phenom II X2/X3/X4&lt;br /&gt;
* Opteron 1300 &amp;quot;Suzuka&amp;quot;&lt;br /&gt;
==== Socket Fr2/Fr5 ====&lt;br /&gt;
* Opteron 2300/8300 &amp;quot;Shanghai&amp;quot; &lt;br /&gt;
=== BL ===&lt;br /&gt;
* [[K10 dies 45 nm|article: K10 dies 45 nm]]&lt;br /&gt;
==== Socket AM3 ====&lt;br /&gt;
* Athlon II X2/X3/X4&lt;br /&gt;
=== DA, Danube ===&lt;br /&gt;
* [[K10 dies 45 nm|article: K10 dies 45 nm]]&lt;br /&gt;
==== Socket ASB2 ====&lt;br /&gt;
* V-Series &lt;br /&gt;
* Athlon II Neo N/K/R&lt;br /&gt;
* Turion II Neo N/K &amp;quot;Geneva&amp;quot;&lt;br /&gt;
==== Socket S1g3/S1g4 ====&lt;br /&gt;
* Turion II M500 &lt;br /&gt;
* Turion II Ultra M600 &amp;quot;Caspian&amp;quot;&lt;br /&gt;
* V-Series&lt;br /&gt;
* Sempron M100&lt;br /&gt;
* Athlon II M300&lt;br /&gt;
* Phenom II N/P/X&lt;br /&gt;
==== Socket AM3 ====&lt;br /&gt;
* Sempron&lt;br /&gt;
* Sempron X2&lt;br /&gt;
* Athlon II XL &amp;amp; XLT (embedded)&lt;br /&gt;
* Athlon II&lt;br /&gt;
* Athlon II X2&lt;br /&gt;
=== HY, Hydra ===&lt;br /&gt;
* [[K10 dies 45 nm|article: K10 dies 45 nm]]&lt;br /&gt;
==== Socket Fr6 ====&lt;br /&gt;
* Opteron 2400/8400 &amp;quot;Istanbul&amp;quot;&lt;br /&gt;
==== Socket C32 ====&lt;br /&gt;
* Opteron 4100 &amp;quot;Lisbon&amp;quot;&lt;br /&gt;
==== Socket G34 ====&lt;br /&gt;
* Opteron 6100 &amp;quot;Magny Cours&amp;quot;&lt;br /&gt;
=== PH, Pharaoh Hound ===&lt;br /&gt;
* [[K10 dies 45 nm|article: K10 dies 45 nm]]&lt;br /&gt;
==== Socket AM3 ====&lt;br /&gt;
* Athlon II X4&lt;br /&gt;
* Phenom II X4 &amp;quot;Zosma&amp;quot;&lt;br /&gt;
* Phenom II X6 &amp;quot;Thuban&amp;quot;&lt;br /&gt;
== AMD 12h K10 CPUs ==&lt;br /&gt;
[[K10 dies 32 nm|detailed article (TO DO)]]&lt;br /&gt;
=== LN, Llano ===&lt;br /&gt;
==== Socket FM1 ====&lt;br /&gt;
* A4, A6, A8 3000 Series&lt;br /&gt;
* Athlon II X4 600 Series&lt;br /&gt;
* E2-3200&lt;br /&gt;
==== Socket FS1 ====&lt;br /&gt;
* A4, A6, A8 3000 Series (Mobile)&lt;br /&gt;
* E2-3000M&lt;br /&gt;
== AMD 14h Bobcat CPUs ==&lt;br /&gt;
=== ON, Ontario ===&lt;br /&gt;
==== Socket FT1 ====&lt;br /&gt;
* C-30, C-50, C-60, C-70&lt;br /&gt;
=== ??, Zacate ===&lt;br /&gt;
=== ??, Desna ===&lt;br /&gt;
== AMD 15h Bulldozer CPUs ==&lt;br /&gt;
=== OR, Orochi ===&lt;br /&gt;
==== Socket AM3+ ====&lt;br /&gt;
* AMD FX &amp;quot;Zambezi&amp;quot;&lt;br /&gt;
* Opteron 3200 &amp;quot;Zurich&amp;quot;&lt;br /&gt;
==== Socket C32 ====&lt;br /&gt;
* Opteron 4200 &amp;quot;Valencia&amp;quot;&lt;br /&gt;
==== Socket G34 ====&lt;br /&gt;
* Opteron 6200 &amp;quot;Interlagos&amp;quot;&lt;br /&gt;
== AMD 15h Piledriver CPUs ==&lt;br /&gt;
=== OR, Orochi ===&lt;br /&gt;
==== Socket AM3+ ====&lt;br /&gt;
* AMD FX &amp;quot;Vishera&amp;quot;&lt;br /&gt;
* Opteron 3300 &amp;quot;Delhi&amp;quot;&lt;br /&gt;
==== Socket C32 ====&lt;br /&gt;
* Opteron 4300 &amp;quot;Seoul&amp;quot;&lt;br /&gt;
==== Socket G34 ====&lt;br /&gt;
* Opteron 6300 &amp;quot;Abu Dhabi&amp;quot; and &amp;quot;Warsaw&amp;quot;&lt;br /&gt;
=== TN, Trinity ===&lt;br /&gt;
==== Socket FM2 ====&lt;br /&gt;
* A4, A6, A8, A10 5000 Series&lt;br /&gt;
* Sempron X2 240&lt;br /&gt;
* Athlon X2 340&lt;br /&gt;
* Athlon X4 730, 740, 750K&lt;br /&gt;
* FirePro A300, A320&lt;br /&gt;
==== Socket FP2 ====&lt;br /&gt;
* A4, A6, A8, A10 4000 Series (Mobile)&lt;br /&gt;
==== Socket FS1r2 ====&lt;br /&gt;
* A4, A6, A8, A10 4000 Series (Mobile)&lt;br /&gt;
=== RL, Richland ===&lt;br /&gt;
==== Socket FM2 ====&lt;br /&gt;
* A4, A6, A8, A10 6000 Series&lt;br /&gt;
* A4 PRO-7300B&lt;br /&gt;
* Athlon X4 750, 760K&lt;br /&gt;
==== Socket FP2 ====&lt;br /&gt;
* A4, A6, A8, A10 5000 Series (Mobile)&lt;br /&gt;
==== Socket FS1r2 ====&lt;br /&gt;
* A4, A6, A8, A10 5000 Series (Mobile)&lt;br /&gt;
=== KM, Komodo ===&lt;br /&gt;
==== Socket FM2 ====&lt;br /&gt;
* Canceled&lt;br /&gt;
== AMD 15h Steamroller CPUs ==&lt;br /&gt;
=== KV, Kaveri ===&lt;br /&gt;
=== GV, Godavari ===&lt;br /&gt;
=== ??, Bald Eagle ===&lt;br /&gt;
== AMD 15h Excavator CPUs ==&lt;br /&gt;
=== CZ, Carrizo ===&lt;br /&gt;
=== BR, Bristol Ridge ===&lt;br /&gt;
=== ST, Stoney Ridge ===&lt;br /&gt;
=== ??, Brown Falcon ===&lt;br /&gt;
=== ??, Prairie Falcon ===&lt;br /&gt;
== AMD 16h Jaguar CPUs ==&lt;br /&gt;
=== KB, Kabini ===&lt;br /&gt;
==== Socket AM1 ====&lt;br /&gt;
==== Socket FT3 ====&lt;br /&gt;
== AMD 16h Puma CPUs ==&lt;br /&gt;
=== ML, Mullins ===&lt;br /&gt;
==== Socket AM1 ====&lt;br /&gt;
==== Socket FT3b ====&lt;/div&gt;</summary>
		<author><name>Mrothfuss</name></author>
	</entry>
	<entry>
		<id>https://15h.org/index.php?title=Family_16h&amp;diff=2888</id>
		<title>Family 16h</title>
		<link rel="alternate" type="text/html" href="https://15h.org/index.php?title=Family_16h&amp;diff=2888"/>
		<updated>2026-05-23T16:34:35Z</updated>

		<summary type="html">&lt;p&gt;Mrothfuss: /* Overview */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{{Infobox cpu family&lt;br /&gt;
  |image = JaguarDieshotFromPS4.jpg&lt;br /&gt;
  |image_size = 300&lt;br /&gt;
  |caption = The die from the [[Jaguar]] APU used in the PlayStation 4&lt;br /&gt;
  |introduced = 2013&lt;br /&gt;
  |processnode = 28nm, except 16nm in some game consoles&lt;br /&gt;
  |uarch1 = [[Jaguar]]&lt;br /&gt;
  |uarch2 = [[Puma]]&lt;br /&gt;
  |predecessor = [[Family 15h]]&lt;br /&gt;
  |successor = Zen APUs&lt;br /&gt;
}}&lt;br /&gt;
&lt;br /&gt;
&#039;&#039;&#039;Family 16h&#039;&#039;&#039; (also known as &#039;&#039;&#039;fam16h&#039;&#039;&#039;, or ambiguously as &#039;&#039;&#039;fam16&#039;&#039;&#039;) is a [[CPU Families Overview|family of AMD microprocessors]] corresponding to the [[Jaguar]] and [[Puma]] microarchitectures. All Family 16h processors were APUs, combining a CPU and a &amp;quot;fast-by-integrated-standards&amp;quot; GPU on a single die. Outside the PC hardware space, it is notable for use in the Xbox One and PlayStation 4 families of eighth-generation game consoles.&lt;br /&gt;
&lt;br /&gt;
&amp;quot;16h&amp;quot; (16-hexadecimal) is most correctly pronounced as &amp;quot;one-sixteen six&amp;quot;, but most people say &amp;quot;sixteen‑aitch&amp;quot;.&lt;br /&gt;
&lt;br /&gt;
Like other AMD family names, 16h (&amp;quot;16 hexadecimal&amp;quot;) is a mostly-arbitrary, somewhat-sequential (new processor families receive unused higher family numbers) number, returned by the x86 &amp;lt;code&amp;gt;CPUID&amp;lt;/code&amp;gt; instruction as a &amp;quot;Family number&amp;quot;, and commonly written in hexadecimal. 16 in hexadecimal corresponds to the number 22 in decimal, meaning that while &amp;quot;Family 22&amp;quot; would also be a valid, if confusing, name for these CPUs, &amp;quot;Family 16&amp;quot; could also refer to [[Family 10h]].&lt;br /&gt;
&lt;br /&gt;
== Overview ==&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;text-align:center;&amp;quot;&lt;br /&gt;
|+&lt;br /&gt;
!&lt;br /&gt;
!Jaguar&lt;br /&gt;
!Puma&lt;br /&gt;
|-&lt;br /&gt;
!&lt;br /&gt;
!Kabini&lt;br /&gt;
!Mullins&lt;br /&gt;
|-&lt;br /&gt;
|Models&lt;br /&gt;
|00h-0Fh&lt;br /&gt;
|30h-3Fh&lt;br /&gt;
|-&lt;br /&gt;
|Release Date&lt;br /&gt;
|2013&lt;br /&gt;
|2014&lt;br /&gt;
|-&lt;br /&gt;
|[[AGESA]]&lt;br /&gt;
|[http://review.coreboot.org/3836 Open Source]&lt;br /&gt;
|Closed Source&lt;br /&gt;
|-&lt;br /&gt;
|BKDG&lt;br /&gt;
|[https://15h.org/images/4/4a/48751_16h_bkdg_-_BIOS_and_Kernel_Developer%E2%80%99s_Guide_%28BKDG%29_for_AMD_Family_16h_Models_00h-0Fh_Processors.pdf 48751]&lt;br /&gt;
|[https://15h.org/images/6/61/52740_16h_Models_30h-3Fh_BKDG.pdf 52740]&lt;br /&gt;
|-&lt;br /&gt;
|coreboot&lt;br /&gt;
| style=&amp;quot;background-color:#AFA&amp;quot; | [[Family_16h#Jaguar|Yes]]&lt;br /&gt;
| style=&amp;quot;background-color:#AFA&amp;quot; | [[Family_16h#Puma|Yes]]&lt;br /&gt;
|-&lt;br /&gt;
|Microcode ROM&lt;br /&gt;
| colspan=&amp;quot;2&amp;quot; |Undocumented&lt;br /&gt;
|-&lt;br /&gt;
|Microcode Patches&lt;br /&gt;
|Unencrypted&lt;br /&gt;
|TBD&lt;br /&gt;
|-&lt;br /&gt;
|[[PSP]]&lt;br /&gt;
|No&lt;br /&gt;
|Online&lt;br /&gt;
|}&lt;br /&gt;
&#039;&#039;For other CPU families besides Family 16h, see [[CPU Families Overview]]&#039;&#039;&lt;br /&gt;
&lt;br /&gt;
== coreboot Compatible Motherboards ==&lt;br /&gt;
=== Jaguar ===&lt;br /&gt;
* Socket [[FT3]]&lt;br /&gt;
** [[Lenovo ThinkPad X140e]] (laptop)&lt;br /&gt;
* Socket [[AM1]]&lt;br /&gt;
** [[AM1I-A|ASUS AM1I-A]] (mini-ITX)&lt;br /&gt;
=== Puma ===&lt;br /&gt;
* Socket [[FT3b]]&lt;br /&gt;
** [[PC Engines APU2]]&lt;br /&gt;
&lt;br /&gt;
== See Also ==&lt;br /&gt;
&lt;br /&gt;
* [[AMD Codenames]]&lt;/div&gt;</summary>
		<author><name>Mrothfuss</name></author>
	</entry>
	<entry>
		<id>https://15h.org/index.php?title=Family_15h&amp;diff=2887</id>
		<title>Family 15h</title>
		<link rel="alternate" type="text/html" href="https://15h.org/index.php?title=Family_15h&amp;diff=2887"/>
		<updated>2026-05-23T16:24:04Z</updated>

		<summary type="html">&lt;p&gt;Mrothfuss: /* Overview */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{{Infobox cpu family&lt;br /&gt;
  |image = E422-opteron-6300-die-shot-16-core.jpg&lt;br /&gt;
  |image_size = 300&lt;br /&gt;
  |caption = The die of a 6300-series [[Opteron]], implementing the [[Piledriver]] microarchitecture.&lt;br /&gt;
  |introduced = October 12, 2011&lt;br /&gt;
  |processnode = GlobalFoundries 32nm SOI&lt;br /&gt;
  |uarch1 = [[Bulldozer]]&lt;br /&gt;
  |uarch2 = [[Piledriver]]&lt;br /&gt;
  |uarch3 = [[Steamroller]]&lt;br /&gt;
  |uarch4 = [[Excavator]]&lt;br /&gt;
  |predecessor = [[Family 10h]]&lt;br /&gt;
  |successor = Zen&lt;br /&gt;
}}&lt;br /&gt;
&lt;br /&gt;
&#039;&#039;&#039;Family 15h&#039;&#039;&#039; (also known as &#039;&#039;&#039;fam15h&#039;&#039;&#039;, or ambiguously as &#039;&#039;&#039;fam15&#039;&#039;&#039;) is a [[CPU Families Overview|family of AMD microprocessors]] corresponding to the [[Bulldozer]], [[Piledriver]], [[Steamroller]], and [[Excavator]] microarchitectures.&lt;br /&gt;
&lt;br /&gt;
&amp;quot;15h&amp;quot; (15-hexadecimal) is most correctly pronounced as &amp;quot;one-sixteen five&amp;quot;, but most people say &amp;quot;fifteen‑aitch&amp;quot;.&lt;br /&gt;
&lt;br /&gt;
Like other AMD family names, &amp;quot;15h&amp;quot; is a mostly-arbitrary, somewhat-sequential number, returned by the &amp;lt;code&amp;gt;CPUID&amp;lt;/code&amp;gt; instruction. The number 15h corresponds to the value 21, meaning that &amp;quot;Family 21&amp;quot; would also be a valid, if confusing, name for these CPUs. &amp;quot;Family 15&amp;quot; could confusingly refer to the Family 0Fh (K8 CPUs, first released in 2003).&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Overview ==&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;text-align:center;&amp;quot;&lt;br /&gt;
|+&lt;br /&gt;
!&lt;br /&gt;
!Bulldozer&lt;br /&gt;
! colspan=&amp;quot;3&amp;quot; |Piledriver&lt;br /&gt;
! colspan=&amp;quot;2&amp;quot; |Steamroller&lt;br /&gt;
! colspan=&amp;quot;3&amp;quot; |Excavator&lt;br /&gt;
|-&lt;br /&gt;
!&lt;br /&gt;
! colspan=&amp;quot;2&amp;quot; |Orochi&lt;br /&gt;
!Trinity&lt;br /&gt;
!Richland&lt;br /&gt;
!Kaveri&lt;br /&gt;
!Godavari&lt;br /&gt;
!Carrizo&lt;br /&gt;
!Bristol Ridge&lt;br /&gt;
!Stoney Ridge&lt;br /&gt;
|-&lt;br /&gt;
|Models&lt;br /&gt;
| colspan=&amp;quot;2&amp;quot; |00h-0Fh&lt;br /&gt;
| colspan=&amp;quot;2&amp;quot; |10h-1Fh&lt;br /&gt;
| colspan=&amp;quot;2&amp;quot; |30h-3Fh&lt;br /&gt;
|60h-6Fh&lt;br /&gt;
| colspan=&amp;quot;2&amp;quot; |70h-7Fh&lt;br /&gt;
|-&lt;br /&gt;
|Release Date&lt;br /&gt;
|2011/10&lt;br /&gt;
|2012/05&lt;br /&gt;
|2012/10&lt;br /&gt;
|2013/06&lt;br /&gt;
|2014/01&lt;br /&gt;
|2015/05&lt;br /&gt;
|2015/06&lt;br /&gt;
|2016/06&lt;br /&gt;
|2016/06&lt;br /&gt;
|-&lt;br /&gt;
|[[AGESA]]&lt;br /&gt;
| colspan=&amp;quot;2&amp;quot; |[https://review.coreboot.org/c/coreboot/+/554 Open Source]&lt;br /&gt;
| colspan=&amp;quot;2&amp;quot; |[http://review.coreboot.org/1155 Open Source]&lt;br /&gt;
| colspan=&amp;quot;5&amp;quot; |Closed Source&lt;br /&gt;
|-&lt;br /&gt;
|BKDG&lt;br /&gt;
| colspan=&amp;quot;2&amp;quot; |[https://15h.org/images/b/be/42301_15h_Mod_00h-0Fh_BKDG.pdf 42301]&lt;br /&gt;
| colspan=&amp;quot;2&amp;quot; |[https://15h.org/images/4/49/42300_15h_Mod_10h-1Fh_BKDG.pdf 42300]&lt;br /&gt;
| colspan=&amp;quot;2&amp;quot; |[https://15h.org/images/0/02/49125_15h_Models_30h-3Fh_BKDG.pdf 49125]&lt;br /&gt;
|[https://15h.org/images/3/3f/50742_15h_Models_60h-6Fh_BKDG.pdf 50742]&lt;br /&gt;
| colspan=&amp;quot;2&amp;quot; |[https://15h.org/images/c/c8/55072_AMD_Family_15h_Models_70h-7Fh_BKDG.pdf 55072]&lt;br /&gt;
|-&lt;br /&gt;
|coreboot&lt;br /&gt;
| colspan=&amp;quot;2&amp;quot; style=&amp;quot;background-color:#AFA&amp;quot; | [[Family_15h#Orochi|Yes]]&lt;br /&gt;
| colspan=&amp;quot;2&amp;quot; style=&amp;quot;background-color:#AFA&amp;quot; | [[Family_15h#Trinity_and_Richland|Yes]]&lt;br /&gt;
| colspan=&amp;quot;4&amp;quot; style=&amp;quot;background-color:#FAA&amp;quot; | No&lt;br /&gt;
| style=&amp;quot;background-color:#AFA&amp;quot; | [[Family_15h#Stoney_Ridge|Yes]]&lt;br /&gt;
|-&lt;br /&gt;
|Microcode ROM&lt;br /&gt;
| colspan=&amp;quot;9&amp;quot; |Undocumented&lt;br /&gt;
|-&lt;br /&gt;
|Microcode Patches&lt;br /&gt;
| colspan=&amp;quot;4&amp;quot; |Encrypted&amp;lt;ref&amp;gt;https://www.dcddcc.com/docs/2014_paper_microcode.pdf&amp;lt;/ref&amp;gt;&lt;br /&gt;
| colspan=&amp;quot;5&amp;quot; |TBD&lt;br /&gt;
|-&lt;br /&gt;
|[[PSP]]&lt;br /&gt;
| colspan=&amp;quot;4&amp;quot; |No&lt;br /&gt;
| colspan=&amp;quot;2&amp;quot; |Offline&lt;br /&gt;
| colspan=&amp;quot;3&amp;quot; |Online&lt;br /&gt;
|}&lt;br /&gt;
&#039;&#039;For other CPU families besides Family 15h, see [[CPU Families Overview]]&#039;&#039;&lt;br /&gt;
&lt;br /&gt;
== coreboot Compatible Motherboards ==&lt;br /&gt;
=== Orochi ===&lt;br /&gt;
* Socket [[AM3+]]&lt;br /&gt;
** [[H8SML|Supermicro H8SML]] (μ-ATX)&lt;br /&gt;
** [[ASUS Sabertooth 990FX R2.0]] (ATX)&lt;br /&gt;
** [[ASUS Crosshair V Formula-Z]] (ATX)&lt;br /&gt;
* Socket [[C32]]&lt;br /&gt;
** [[Supermicro H8SCM]] (μ-ATX)&lt;br /&gt;
** [[ASUS KCMA-D8]] (SSI CEB)&lt;br /&gt;
* Socket [[G34]]&lt;br /&gt;
** [[ASUS KGPE-D16]] (SSI EEB)&lt;br /&gt;
** [[Supermicro H8QG6]] (SWTX)&lt;br /&gt;
** [[Supermicro H8SGL]] (ATX)&lt;br /&gt;
=== Trinity and Richland ===&lt;br /&gt;
* Socket [[FM2]]&lt;br /&gt;
** [[F2A85-M|ASUS F2A85-M]] (μ-ATX)&lt;br /&gt;
* Socket [[FS1|FS1r2]]&lt;br /&gt;
** [[G505s|Lenovo G505s]] (Laptop, 15.6in)&lt;br /&gt;
=== Stoney Ridge ===&lt;br /&gt;
* Chromebooks supported by [https://docs.mrchromebox.tech/ MrChromebox].&lt;br /&gt;
** Acer Chromebook 315 (CB315-2H)&lt;br /&gt;
** HP Chromebook 11A G6 EE&lt;br /&gt;
** HP Chromebook 11A G8 EE&lt;br /&gt;
** HP Chromebook 14A G5&lt;br /&gt;
** Acer Chromebook 311 (C721)&lt;br /&gt;
** Acer Chromebook Spin 311 (R721T)&lt;br /&gt;
** Lenovo 14e Chromebook (S345)&lt;br /&gt;
** Lenovo 100e Chromebook Gen 2 AMD&lt;br /&gt;
** Lenovo IdeaPad 3 Chromebook 11AST5&lt;br /&gt;
** Lenovo 300e Chromebook Gen 2 AMD&lt;br /&gt;
** NEC Chromebook Y1 Gen2A&lt;br /&gt;
&lt;br /&gt;
== Notes and Status ==&lt;br /&gt;
* All x86 CPUs include proprietary microcode, in ROM on the CPU itself. Later vendor-provided patches, which update part of this microcode, can be loaded at runtime - these patches are proprietary blobs.&lt;br /&gt;
* All Family 15h CPUs are vulnerable to speculative execution exploits if a microcode patch is not loaded.&lt;br /&gt;
* Apart from the above, Bulldozer CPUs are generally stable even without microcode patches.&lt;br /&gt;
* A microcode patch is strongly recommended for Piledriver CPUs, because of known virtualization-related bugs in their ROM microcode.&lt;br /&gt;
* Trinity APUs and Richland APUs additionally require the SMU firmware blob to run. The [[SMU|SMU (System Management Unit)]] is a microcontroller inside AMD SoCs/APUs that handles low-level platform management: power, clocks, voltage, thermal control, power-gating, and related sensors and interrupts. The firmware for this microcontroller is a blob, [https://git.15h.org/mrothfuss/coreboot-15h/src/branch/4.11_branch/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbInitTN/GnbSmuFirmwareTN.h included as a large array] in the Family 15h [[AGESA]]. Orochi platforms do not require this blob.&lt;br /&gt;
&lt;br /&gt;
== Microcode Patches ==&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
|+Below is the list of ucode versions that could be pulled from the container files in the linux kernel&lt;br /&gt;
!commit&lt;br /&gt;
!comment&lt;br /&gt;
!date&lt;br /&gt;
!ucode version&lt;br /&gt;
!Microarchitecture&lt;br /&gt;
|-&lt;br /&gt;
|[https://kernel.googlesource.com/pub/scm/linux/kernel/git/firmware/linux-firmware/+archive/31f6b3076bab3c4b65f67fdb232f4579ed828b4f.tar.gz 31f6b30]&lt;br /&gt;
|linux-firmware: Add AMD microcode patch firmware files&lt;br /&gt;
|Jul 11 2013&lt;br /&gt;
|06000822&lt;br /&gt;
|&lt;br /&gt;
|-&lt;br /&gt;
|[https://kernel.googlesource.com/pub/scm/linux/kernel/git/firmware/linux-firmware/+archive/8ac569dd3ca3ca685bd47ee86c1eeb6050864db3.tar.gz 8ac569d]&lt;br /&gt;
|linux-firmware: Update AMD microcode patch firmware files&lt;br /&gt;
|Nov 30 2014&lt;br /&gt;
|06000832&lt;br /&gt;
|&lt;br /&gt;
|-&lt;br /&gt;
|[https://kernel.googlesource.com/pub/scm/linux/kernel/git/firmware/linux-firmware/+archive/5f8ca0c1db6106a2d6d7e85eee778917ff03c3de.tar.gz 5f8ca0c]&lt;br /&gt;
|linux-firmware: Update AMD microcode patch firmware&lt;br /&gt;
|Mar 18 2016&lt;br /&gt;
|0600084f&lt;br /&gt;
|&lt;br /&gt;
|-&lt;br /&gt;
|[https://kernel.googlesource.com/pub/scm/linux/kernel/git/firmware/linux-firmware/+archive/77101513943ef198e2050667c87abf19e6cbb1d8.tar.gz 7710151]&lt;br /&gt;
|linux-firmware: Update AMD cpu microcode&lt;br /&gt;
|May 18 2018&lt;br /&gt;
|06000852&lt;br /&gt;
|Piledriver&lt;br /&gt;
|-&lt;br /&gt;
|[https://kernel.googlesource.com/pub/scm/linux/kernel/git/firmware/linux-firmware/+archive/7518922bd5b98b137af7aaf3c836f5a498e91609.tar.gz 7518922]&lt;br /&gt;
|Update AMD cpu microcode for family 15h&lt;br /&gt;
|May 25 2018&lt;br /&gt;
|0600063e&lt;br /&gt;
|Bulldozer&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== Developer Documentation ==&lt;br /&gt;
[[File:Socket G34 pinmap.svg|thumb|G34 socket pinout]]&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
|+Below is the documentation for all 15h model revisions&lt;br /&gt;
!Model rage&lt;br /&gt;
!Date&lt;br /&gt;
!Revision&lt;br /&gt;
!Link&lt;br /&gt;
|-&lt;br /&gt;
|00h-0Fh&lt;br /&gt;
|September 2014&lt;br /&gt;
|3.24&lt;br /&gt;
|[https://web.archive.org/web/20220321092743/https://www.amd.com/system/files/TechDocs/48063_15h_Mod_00h-0Fh_Rev_Guide.pdf 48063_15h_Mod_00h-0Fh_Rev_Guide.pdf]&lt;br /&gt;
|-&lt;br /&gt;
|10h-1Fh&lt;br /&gt;
|August 2012&lt;br /&gt;
|3.08&lt;br /&gt;
|[https://web.archive.org/web/20220129072252/https://www.amd.com/system/files/TechDocs/48931_15h_Mod_10h-1Fh_Rev_Guide.pdf 48931_15h_Mod_10h-1Fh_Rev_Guide.pdf]&lt;br /&gt;
|-&lt;br /&gt;
|30h-3Fh&lt;br /&gt;
|April 2014&lt;br /&gt;
|1.06&lt;br /&gt;
|[https://web.archive.org/web/20220121164248/https://www.amd.com/system/files/TechDocs/51603_Rev_Guide_15h_Models_30h-3Fh.pdf 51603_Rev_Guide_15h_Models_30h-3Fh.pdf]&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
== See Also ==&lt;br /&gt;
&lt;br /&gt;
* [[CPU Families Overview]]&lt;br /&gt;
* [[AMD Codenames]]&lt;br /&gt;
* [[Abbreviations and Acronyms List]]&lt;br /&gt;
&lt;br /&gt;
== References ==&lt;/div&gt;</summary>
		<author><name>Mrothfuss</name></author>
	</entry>
	<entry>
		<id>https://15h.org/index.php?title=Family_10h&amp;diff=2886</id>
		<title>Family 10h</title>
		<link rel="alternate" type="text/html" href="https://15h.org/index.php?title=Family_10h&amp;diff=2886"/>
		<updated>2026-05-23T03:51:41Z</updated>

		<summary type="html">&lt;p&gt;Mrothfuss: /* Microcode */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{{Infobox cpu family&lt;br /&gt;
  |introduced = 2007&lt;br /&gt;
  |processnode = GlobalFoundries 45 nm SOI, with early models on 65 nm SOI&lt;br /&gt;
  |uarch1 = [[K10]]&lt;br /&gt;
  |predecessor = Family 0Fh (K8)&lt;br /&gt;
  |successor = [[Family 12h]] Llano;&lt;br /&gt;
  [[Family 15h]] Bulldozer&lt;br /&gt;
}}&lt;br /&gt;
&lt;br /&gt;
&#039;&#039;&#039;Family 10h&#039;&#039;&#039; (also known as &#039;&#039;&#039;fam10h&#039;&#039;&#039;, or ambiguously as &#039;&#039;&#039;fam10&#039;&#039;&#039;) is a [[CPU Families Overview|family of AMD microprocessors]] corresponding to the [[K10|K10 microarchitecure]]. However, the K10 microarchitecture is additionally used in the Family 12h &amp;quot;Llano&amp;quot; dies.&lt;br /&gt;
&lt;br /&gt;
&amp;quot;10h&amp;quot; (10-hexadecimal) is most correctly pronounced as &amp;quot;one-sixteen zero&amp;quot;, but most people say &amp;quot;ten‑aitch&amp;quot;.&lt;br /&gt;
&lt;br /&gt;
Like other AMD family names, 10h (&amp;quot;10 hexadecimal&amp;quot;) is a mostly-arbitrary, somewhat-sequential number, returned by the &amp;lt;code&amp;gt;CPUID&amp;lt;/code&amp;gt; instruction, and commonly written in hexadecimal. &lt;br /&gt;
&lt;br /&gt;
[[File:Magny-Cours GLOBALFUNDRIES.png|thumb|Magny-Cours Silicon&amp;lt;ref&amp;gt;https://15h.org/images/d/d1/HC21.24.110.Conway-AMD-Magny-Cours.pdf&amp;lt;/ref&amp;gt;]]&lt;br /&gt;
&lt;br /&gt;
== Overview ==&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;text-align:center;&amp;quot;&lt;br /&gt;
|+&lt;br /&gt;
!&lt;br /&gt;
!K10&lt;br /&gt;
|-&lt;br /&gt;
|Release Date&lt;br /&gt;
|2007&lt;br /&gt;
|-&lt;br /&gt;
|[[AGESA]]&lt;br /&gt;
|[https://review.coreboot.org/c/coreboot/+/95 Open Source]&lt;br /&gt;
|-&lt;br /&gt;
|BKDG&lt;br /&gt;
|[https://15h.org/images/3/3f/31116_-_BIOS_and_Kernel_Developer%E2%80%99s_Guide_%28BKDG%29_For_AMD_Family_10h_Processors_%2831116%29.pdf 31116]&lt;br /&gt;
|-&lt;br /&gt;
|coreboot&lt;br /&gt;
| style=&amp;quot;background-color:#FAA&amp;quot; | No&lt;br /&gt;
|-&lt;br /&gt;
|Microcode ROM&lt;br /&gt;
|Undocumented&lt;br /&gt;
|-&lt;br /&gt;
|Microcode Patches&lt;br /&gt;
|Unencrypted&lt;br /&gt;
|-&lt;br /&gt;
|[[PSP]]&lt;br /&gt;
|No&lt;br /&gt;
|}&lt;br /&gt;
&#039;&#039;For other CPU families besides Family 10h, see [[CPU Families Overview]]&#039;&#039;&lt;br /&gt;
&lt;br /&gt;
== Development Documentation Files and BKDG from AMD ==&lt;br /&gt;
This wiki hosts the following documens relevant for Family 10h coreboot development:&lt;br /&gt;
&lt;br /&gt;
* [[:File:31116 - BIOS and Kernel Developer’s Guide (BKDG) For AMD Family 10h Processors (31116).pdf|31116 - (BKGD) - BIOS and Kernel Developer’s Guide (BKDG) For AMD Family 10h Processors.pdf]]&lt;br /&gt;
* [[:File:41322 10h Rev Gd - Revision Guide for AMD Family 10h Processors (41322).pdf|41322 - (Family 10h) - Revision Guide for AMD Family 10h Processors.pdf]]&lt;br /&gt;
* [[:File:40546 - Software Optimization Guide for AMD Family 10h and 12h Processors (40546).pdf|40546 - Software Optimization Guide for AMD Family 10h and 12h Processors.pdf]]&lt;br /&gt;
* [[:File:43374 - AMD Family 10h Server and Workstation Processor Power and Thermal Data Sheet (43374).pdf|43374 - AMD Family 10h Server and Workstation Processor Power and Thermal Data Sheet.pdf]]&lt;br /&gt;
&lt;br /&gt;
== See Also ==&lt;br /&gt;
&lt;br /&gt;
* [[CPU Families Overview]]&lt;br /&gt;
* [[K10]]&lt;br /&gt;
&lt;br /&gt;
== References ==&lt;br /&gt;
&lt;br /&gt;
(2017 paper) Reverse Engineering x86 Processor Microcode&lt;br /&gt;
&amp;lt;ref name=&amp;quot;ReverseEngineering-x86&amp;quot;&amp;gt;&lt;br /&gt;
    https://www.usenix.org/system/files/conference/usenixsecurity17/sec17-koppe.pdf&amp;lt;/ref&amp;gt;&lt;/div&gt;</summary>
		<author><name>Mrothfuss</name></author>
	</entry>
	<entry>
		<id>https://15h.org/index.php?title=Family_16h&amp;diff=2885</id>
		<title>Family 16h</title>
		<link rel="alternate" type="text/html" href="https://15h.org/index.php?title=Family_16h&amp;diff=2885"/>
		<updated>2026-05-23T03:51:12Z</updated>

		<summary type="html">&lt;p&gt;Mrothfuss: /* Development Documentation Files and BKDG from AMD */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{{Infobox cpu family&lt;br /&gt;
  |image = JaguarDieshotFromPS4.jpg&lt;br /&gt;
  |image_size = 300&lt;br /&gt;
  |caption = The die from the [[Jaguar]] APU used in the PlayStation 4&lt;br /&gt;
  |introduced = 2013&lt;br /&gt;
  |processnode = 28nm, except 16nm in some game consoles&lt;br /&gt;
  |uarch1 = [[Jaguar]]&lt;br /&gt;
  |uarch2 = [[Puma]]&lt;br /&gt;
  |predecessor = [[Family 15h]]&lt;br /&gt;
  |successor = Zen APUs&lt;br /&gt;
}}&lt;br /&gt;
&lt;br /&gt;
&#039;&#039;&#039;Family 16h&#039;&#039;&#039; (also known as &#039;&#039;&#039;fam16h&#039;&#039;&#039;, or ambiguously as &#039;&#039;&#039;fam16&#039;&#039;&#039;) is a [[CPU Families Overview|family of AMD microprocessors]] corresponding to the [[Jaguar]] and [[Puma]] microarchitectures. All Family 16h processors were APUs, combining a CPU and a &amp;quot;fast-by-integrated-standards&amp;quot; GPU on a single die. Outside the PC hardware space, it is notable for use in the Xbox One and PlayStation 4 families of eighth-generation game consoles.&lt;br /&gt;
&lt;br /&gt;
&amp;quot;16h&amp;quot; (16-hexadecimal) is most correctly pronounced as &amp;quot;one-sixteen six&amp;quot;, but most people say &amp;quot;sixteen‑aitch&amp;quot;.&lt;br /&gt;
&lt;br /&gt;
Like other AMD family names, 16h (&amp;quot;16 hexadecimal&amp;quot;) is a mostly-arbitrary, somewhat-sequential (new processor families receive unused higher family numbers) number, returned by the x86 &amp;lt;code&amp;gt;CPUID&amp;lt;/code&amp;gt; instruction as a &amp;quot;Family number&amp;quot;, and commonly written in hexadecimal. 16 in hexadecimal corresponds to the number 22 in decimal, meaning that while &amp;quot;Family 22&amp;quot; would also be a valid, if confusing, name for these CPUs, &amp;quot;Family 16&amp;quot; could also refer to [[Family 10h]].&lt;br /&gt;
&lt;br /&gt;
== Overview ==&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;text-align:center;&amp;quot;&lt;br /&gt;
|+&lt;br /&gt;
!&lt;br /&gt;
!Jaguar&lt;br /&gt;
!Puma&lt;br /&gt;
|-&lt;br /&gt;
|Models&lt;br /&gt;
|00h-0Fh&lt;br /&gt;
|30h-3Fh&lt;br /&gt;
|-&lt;br /&gt;
|Release Date&lt;br /&gt;
|2013&lt;br /&gt;
|2014&lt;br /&gt;
|-&lt;br /&gt;
|[[AGESA]]&lt;br /&gt;
|[http://review.coreboot.org/3836 Open Source]&lt;br /&gt;
|Closed Source&lt;br /&gt;
|-&lt;br /&gt;
|BKDG&lt;br /&gt;
|[https://15h.org/images/4/4a/48751_16h_bkdg_-_BIOS_and_Kernel_Developer%E2%80%99s_Guide_%28BKDG%29_for_AMD_Family_16h_Models_00h-0Fh_Processors.pdf 48751]&lt;br /&gt;
|[https://15h.org/images/6/61/52740_16h_Models_30h-3Fh_BKDG.pdf 52740]&lt;br /&gt;
|-&lt;br /&gt;
|coreboot&lt;br /&gt;
| style=&amp;quot;background-color:#AFA&amp;quot; | [[Family_16h#coreboot_Compatible_Motherboards|Yes]]&lt;br /&gt;
| style=&amp;quot;background-color:#FAA&amp;quot; | No&lt;br /&gt;
|-&lt;br /&gt;
|Microcode ROM&lt;br /&gt;
| colspan=&amp;quot;2&amp;quot; |Undocumented&lt;br /&gt;
|-&lt;br /&gt;
|Microcode Patches&lt;br /&gt;
|Unencrypted&lt;br /&gt;
|TBD&lt;br /&gt;
|-&lt;br /&gt;
|[[PSP]]&lt;br /&gt;
|No&lt;br /&gt;
|Online&lt;br /&gt;
|}&lt;br /&gt;
&#039;&#039;For other CPU families besides Family 16h, see [[CPU Families Overview]]&#039;&#039;&lt;br /&gt;
&lt;br /&gt;
== coreboot Compatible Motherboards ==&lt;br /&gt;
=== Jaguar ===&lt;br /&gt;
* Socket [[FT3]]&lt;br /&gt;
** [[Lenovo ThinkPad X140e]] (laptop)&lt;br /&gt;
* Socket [[AM1]]&lt;br /&gt;
** [[AM1I-A|ASUS AM1I-A]] (mini-ITX)&lt;br /&gt;
&lt;br /&gt;
== See Also ==&lt;br /&gt;
&lt;br /&gt;
* [[AMD Codenames]]&lt;/div&gt;</summary>
		<author><name>Mrothfuss</name></author>
	</entry>
	<entry>
		<id>https://15h.org/index.php?title=Family_16h&amp;diff=2884</id>
		<title>Family 16h</title>
		<link rel="alternate" type="text/html" href="https://15h.org/index.php?title=Family_16h&amp;diff=2884"/>
		<updated>2026-05-23T03:51:06Z</updated>

		<summary type="html">&lt;p&gt;Mrothfuss: /* Microcode Patches */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{{Infobox cpu family&lt;br /&gt;
  |image = JaguarDieshotFromPS4.jpg&lt;br /&gt;
  |image_size = 300&lt;br /&gt;
  |caption = The die from the [[Jaguar]] APU used in the PlayStation 4&lt;br /&gt;
  |introduced = 2013&lt;br /&gt;
  |processnode = 28nm, except 16nm in some game consoles&lt;br /&gt;
  |uarch1 = [[Jaguar]]&lt;br /&gt;
  |uarch2 = [[Puma]]&lt;br /&gt;
  |predecessor = [[Family 15h]]&lt;br /&gt;
  |successor = Zen APUs&lt;br /&gt;
}}&lt;br /&gt;
&lt;br /&gt;
&#039;&#039;&#039;Family 16h&#039;&#039;&#039; (also known as &#039;&#039;&#039;fam16h&#039;&#039;&#039;, or ambiguously as &#039;&#039;&#039;fam16&#039;&#039;&#039;) is a [[CPU Families Overview|family of AMD microprocessors]] corresponding to the [[Jaguar]] and [[Puma]] microarchitectures. All Family 16h processors were APUs, combining a CPU and a &amp;quot;fast-by-integrated-standards&amp;quot; GPU on a single die. Outside the PC hardware space, it is notable for use in the Xbox One and PlayStation 4 families of eighth-generation game consoles.&lt;br /&gt;
&lt;br /&gt;
&amp;quot;16h&amp;quot; (16-hexadecimal) is most correctly pronounced as &amp;quot;one-sixteen six&amp;quot;, but most people say &amp;quot;sixteen‑aitch&amp;quot;.&lt;br /&gt;
&lt;br /&gt;
Like other AMD family names, 16h (&amp;quot;16 hexadecimal&amp;quot;) is a mostly-arbitrary, somewhat-sequential (new processor families receive unused higher family numbers) number, returned by the x86 &amp;lt;code&amp;gt;CPUID&amp;lt;/code&amp;gt; instruction as a &amp;quot;Family number&amp;quot;, and commonly written in hexadecimal. 16 in hexadecimal corresponds to the number 22 in decimal, meaning that while &amp;quot;Family 22&amp;quot; would also be a valid, if confusing, name for these CPUs, &amp;quot;Family 16&amp;quot; could also refer to [[Family 10h]].&lt;br /&gt;
&lt;br /&gt;
== Overview ==&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;text-align:center;&amp;quot;&lt;br /&gt;
|+&lt;br /&gt;
!&lt;br /&gt;
!Jaguar&lt;br /&gt;
!Puma&lt;br /&gt;
|-&lt;br /&gt;
|Models&lt;br /&gt;
|00h-0Fh&lt;br /&gt;
|30h-3Fh&lt;br /&gt;
|-&lt;br /&gt;
|Release Date&lt;br /&gt;
|2013&lt;br /&gt;
|2014&lt;br /&gt;
|-&lt;br /&gt;
|[[AGESA]]&lt;br /&gt;
|[http://review.coreboot.org/3836 Open Source]&lt;br /&gt;
|Closed Source&lt;br /&gt;
|-&lt;br /&gt;
|BKDG&lt;br /&gt;
|[https://15h.org/images/4/4a/48751_16h_bkdg_-_BIOS_and_Kernel_Developer%E2%80%99s_Guide_%28BKDG%29_for_AMD_Family_16h_Models_00h-0Fh_Processors.pdf 48751]&lt;br /&gt;
|[https://15h.org/images/6/61/52740_16h_Models_30h-3Fh_BKDG.pdf 52740]&lt;br /&gt;
|-&lt;br /&gt;
|coreboot&lt;br /&gt;
| style=&amp;quot;background-color:#AFA&amp;quot; | [[Family_16h#coreboot_Compatible_Motherboards|Yes]]&lt;br /&gt;
| style=&amp;quot;background-color:#FAA&amp;quot; | No&lt;br /&gt;
|-&lt;br /&gt;
|Microcode ROM&lt;br /&gt;
| colspan=&amp;quot;2&amp;quot; |Undocumented&lt;br /&gt;
|-&lt;br /&gt;
|Microcode Patches&lt;br /&gt;
|Unencrypted&lt;br /&gt;
|TBD&lt;br /&gt;
|-&lt;br /&gt;
|[[PSP]]&lt;br /&gt;
|No&lt;br /&gt;
|Online&lt;br /&gt;
|}&lt;br /&gt;
&#039;&#039;For other CPU families besides Family 16h, see [[CPU Families Overview]]&#039;&#039;&lt;br /&gt;
&lt;br /&gt;
== coreboot Compatible Motherboards ==&lt;br /&gt;
=== Jaguar ===&lt;br /&gt;
* Socket [[FT3]]&lt;br /&gt;
** [[Lenovo ThinkPad X140e]] (laptop)&lt;br /&gt;
* Socket [[AM1]]&lt;br /&gt;
** [[AM1I-A|ASUS AM1I-A]] (mini-ITX)&lt;br /&gt;
&lt;br /&gt;
== Development Documentation Files and BKDG from AMD ==&lt;br /&gt;
This wiki hosts the following documens relevant for Family 10h coreboot development:&lt;br /&gt;
&lt;br /&gt;
* (TO DO)&lt;br /&gt;
&lt;br /&gt;
== See Also ==&lt;br /&gt;
&lt;br /&gt;
* [[AMD Codenames]]&lt;/div&gt;</summary>
		<author><name>Mrothfuss</name></author>
	</entry>
	<entry>
		<id>https://15h.org/index.php?title=Family_16h&amp;diff=2883</id>
		<title>Family 16h</title>
		<link rel="alternate" type="text/html" href="https://15h.org/index.php?title=Family_16h&amp;diff=2883"/>
		<updated>2026-05-23T03:51:01Z</updated>

		<summary type="html">&lt;p&gt;Mrothfuss: /* Notes and Status */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{{Infobox cpu family&lt;br /&gt;
  |image = JaguarDieshotFromPS4.jpg&lt;br /&gt;
  |image_size = 300&lt;br /&gt;
  |caption = The die from the [[Jaguar]] APU used in the PlayStation 4&lt;br /&gt;
  |introduced = 2013&lt;br /&gt;
  |processnode = 28nm, except 16nm in some game consoles&lt;br /&gt;
  |uarch1 = [[Jaguar]]&lt;br /&gt;
  |uarch2 = [[Puma]]&lt;br /&gt;
  |predecessor = [[Family 15h]]&lt;br /&gt;
  |successor = Zen APUs&lt;br /&gt;
}}&lt;br /&gt;
&lt;br /&gt;
&#039;&#039;&#039;Family 16h&#039;&#039;&#039; (also known as &#039;&#039;&#039;fam16h&#039;&#039;&#039;, or ambiguously as &#039;&#039;&#039;fam16&#039;&#039;&#039;) is a [[CPU Families Overview|family of AMD microprocessors]] corresponding to the [[Jaguar]] and [[Puma]] microarchitectures. All Family 16h processors were APUs, combining a CPU and a &amp;quot;fast-by-integrated-standards&amp;quot; GPU on a single die. Outside the PC hardware space, it is notable for use in the Xbox One and PlayStation 4 families of eighth-generation game consoles.&lt;br /&gt;
&lt;br /&gt;
&amp;quot;16h&amp;quot; (16-hexadecimal) is most correctly pronounced as &amp;quot;one-sixteen six&amp;quot;, but most people say &amp;quot;sixteen‑aitch&amp;quot;.&lt;br /&gt;
&lt;br /&gt;
Like other AMD family names, 16h (&amp;quot;16 hexadecimal&amp;quot;) is a mostly-arbitrary, somewhat-sequential (new processor families receive unused higher family numbers) number, returned by the x86 &amp;lt;code&amp;gt;CPUID&amp;lt;/code&amp;gt; instruction as a &amp;quot;Family number&amp;quot;, and commonly written in hexadecimal. 16 in hexadecimal corresponds to the number 22 in decimal, meaning that while &amp;quot;Family 22&amp;quot; would also be a valid, if confusing, name for these CPUs, &amp;quot;Family 16&amp;quot; could also refer to [[Family 10h]].&lt;br /&gt;
&lt;br /&gt;
== Overview ==&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;text-align:center;&amp;quot;&lt;br /&gt;
|+&lt;br /&gt;
!&lt;br /&gt;
!Jaguar&lt;br /&gt;
!Puma&lt;br /&gt;
|-&lt;br /&gt;
|Models&lt;br /&gt;
|00h-0Fh&lt;br /&gt;
|30h-3Fh&lt;br /&gt;
|-&lt;br /&gt;
|Release Date&lt;br /&gt;
|2013&lt;br /&gt;
|2014&lt;br /&gt;
|-&lt;br /&gt;
|[[AGESA]]&lt;br /&gt;
|[http://review.coreboot.org/3836 Open Source]&lt;br /&gt;
|Closed Source&lt;br /&gt;
|-&lt;br /&gt;
|BKDG&lt;br /&gt;
|[https://15h.org/images/4/4a/48751_16h_bkdg_-_BIOS_and_Kernel_Developer%E2%80%99s_Guide_%28BKDG%29_for_AMD_Family_16h_Models_00h-0Fh_Processors.pdf 48751]&lt;br /&gt;
|[https://15h.org/images/6/61/52740_16h_Models_30h-3Fh_BKDG.pdf 52740]&lt;br /&gt;
|-&lt;br /&gt;
|coreboot&lt;br /&gt;
| style=&amp;quot;background-color:#AFA&amp;quot; | [[Family_16h#coreboot_Compatible_Motherboards|Yes]]&lt;br /&gt;
| style=&amp;quot;background-color:#FAA&amp;quot; | No&lt;br /&gt;
|-&lt;br /&gt;
|Microcode ROM&lt;br /&gt;
| colspan=&amp;quot;2&amp;quot; |Undocumented&lt;br /&gt;
|-&lt;br /&gt;
|Microcode Patches&lt;br /&gt;
|Unencrypted&lt;br /&gt;
|TBD&lt;br /&gt;
|-&lt;br /&gt;
|[[PSP]]&lt;br /&gt;
|No&lt;br /&gt;
|Online&lt;br /&gt;
|}&lt;br /&gt;
&#039;&#039;For other CPU families besides Family 16h, see [[CPU Families Overview]]&#039;&#039;&lt;br /&gt;
&lt;br /&gt;
== coreboot Compatible Motherboards ==&lt;br /&gt;
=== Jaguar ===&lt;br /&gt;
* Socket [[FT3]]&lt;br /&gt;
** [[Lenovo ThinkPad X140e]] (laptop)&lt;br /&gt;
* Socket [[AM1]]&lt;br /&gt;
** [[AM1I-A|ASUS AM1I-A]] (mini-ITX)&lt;br /&gt;
&lt;br /&gt;
== Microcode Patches ==&lt;br /&gt;
&lt;br /&gt;
* (TO DO): list of microcode patches goes here&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Development Documentation Files and BKDG from AMD ==&lt;br /&gt;
This wiki hosts the following documens relevant for Family 10h coreboot development:&lt;br /&gt;
&lt;br /&gt;
* (TO DO)&lt;br /&gt;
&lt;br /&gt;
== See Also ==&lt;br /&gt;
&lt;br /&gt;
* [[AMD Codenames]]&lt;/div&gt;</summary>
		<author><name>Mrothfuss</name></author>
	</entry>
	<entry>
		<id>https://15h.org/index.php?title=Family_16h&amp;diff=2882</id>
		<title>Family 16h</title>
		<link rel="alternate" type="text/html" href="https://15h.org/index.php?title=Family_16h&amp;diff=2882"/>
		<updated>2026-05-23T03:50:57Z</updated>

		<summary type="html">&lt;p&gt;Mrothfuss: /* Third-party coreboot Support */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{{Infobox cpu family&lt;br /&gt;
  |image = JaguarDieshotFromPS4.jpg&lt;br /&gt;
  |image_size = 300&lt;br /&gt;
  |caption = The die from the [[Jaguar]] APU used in the PlayStation 4&lt;br /&gt;
  |introduced = 2013&lt;br /&gt;
  |processnode = 28nm, except 16nm in some game consoles&lt;br /&gt;
  |uarch1 = [[Jaguar]]&lt;br /&gt;
  |uarch2 = [[Puma]]&lt;br /&gt;
  |predecessor = [[Family 15h]]&lt;br /&gt;
  |successor = Zen APUs&lt;br /&gt;
}}&lt;br /&gt;
&lt;br /&gt;
&#039;&#039;&#039;Family 16h&#039;&#039;&#039; (also known as &#039;&#039;&#039;fam16h&#039;&#039;&#039;, or ambiguously as &#039;&#039;&#039;fam16&#039;&#039;&#039;) is a [[CPU Families Overview|family of AMD microprocessors]] corresponding to the [[Jaguar]] and [[Puma]] microarchitectures. All Family 16h processors were APUs, combining a CPU and a &amp;quot;fast-by-integrated-standards&amp;quot; GPU on a single die. Outside the PC hardware space, it is notable for use in the Xbox One and PlayStation 4 families of eighth-generation game consoles.&lt;br /&gt;
&lt;br /&gt;
&amp;quot;16h&amp;quot; (16-hexadecimal) is most correctly pronounced as &amp;quot;one-sixteen six&amp;quot;, but most people say &amp;quot;sixteen‑aitch&amp;quot;.&lt;br /&gt;
&lt;br /&gt;
Like other AMD family names, 16h (&amp;quot;16 hexadecimal&amp;quot;) is a mostly-arbitrary, somewhat-sequential (new processor families receive unused higher family numbers) number, returned by the x86 &amp;lt;code&amp;gt;CPUID&amp;lt;/code&amp;gt; instruction as a &amp;quot;Family number&amp;quot;, and commonly written in hexadecimal. 16 in hexadecimal corresponds to the number 22 in decimal, meaning that while &amp;quot;Family 22&amp;quot; would also be a valid, if confusing, name for these CPUs, &amp;quot;Family 16&amp;quot; could also refer to [[Family 10h]].&lt;br /&gt;
&lt;br /&gt;
== Overview ==&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;text-align:center;&amp;quot;&lt;br /&gt;
|+&lt;br /&gt;
!&lt;br /&gt;
!Jaguar&lt;br /&gt;
!Puma&lt;br /&gt;
|-&lt;br /&gt;
|Models&lt;br /&gt;
|00h-0Fh&lt;br /&gt;
|30h-3Fh&lt;br /&gt;
|-&lt;br /&gt;
|Release Date&lt;br /&gt;
|2013&lt;br /&gt;
|2014&lt;br /&gt;
|-&lt;br /&gt;
|[[AGESA]]&lt;br /&gt;
|[http://review.coreboot.org/3836 Open Source]&lt;br /&gt;
|Closed Source&lt;br /&gt;
|-&lt;br /&gt;
|BKDG&lt;br /&gt;
|[https://15h.org/images/4/4a/48751_16h_bkdg_-_BIOS_and_Kernel_Developer%E2%80%99s_Guide_%28BKDG%29_for_AMD_Family_16h_Models_00h-0Fh_Processors.pdf 48751]&lt;br /&gt;
|[https://15h.org/images/6/61/52740_16h_Models_30h-3Fh_BKDG.pdf 52740]&lt;br /&gt;
|-&lt;br /&gt;
|coreboot&lt;br /&gt;
| style=&amp;quot;background-color:#AFA&amp;quot; | [[Family_16h#coreboot_Compatible_Motherboards|Yes]]&lt;br /&gt;
| style=&amp;quot;background-color:#FAA&amp;quot; | No&lt;br /&gt;
|-&lt;br /&gt;
|Microcode ROM&lt;br /&gt;
| colspan=&amp;quot;2&amp;quot; |Undocumented&lt;br /&gt;
|-&lt;br /&gt;
|Microcode Patches&lt;br /&gt;
|Unencrypted&lt;br /&gt;
|TBD&lt;br /&gt;
|-&lt;br /&gt;
|[[PSP]]&lt;br /&gt;
|No&lt;br /&gt;
|Online&lt;br /&gt;
|}&lt;br /&gt;
&#039;&#039;For other CPU families besides Family 16h, see [[CPU Families Overview]]&#039;&#039;&lt;br /&gt;
&lt;br /&gt;
== coreboot Compatible Motherboards ==&lt;br /&gt;
=== Jaguar ===&lt;br /&gt;
* Socket [[FT3]]&lt;br /&gt;
** [[Lenovo ThinkPad X140e]] (laptop)&lt;br /&gt;
* Socket [[AM1]]&lt;br /&gt;
** [[AM1I-A|ASUS AM1I-A]] (mini-ITX)&lt;br /&gt;
&lt;br /&gt;
== Notes and Status ==&lt;br /&gt;
&lt;br /&gt;
* ... any extra notes go into the list here ....&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Microcode Patches ==&lt;br /&gt;
&lt;br /&gt;
* (TO DO): list of microcode patches goes here&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Development Documentation Files and BKDG from AMD ==&lt;br /&gt;
This wiki hosts the following documens relevant for Family 10h coreboot development:&lt;br /&gt;
&lt;br /&gt;
* (TO DO)&lt;br /&gt;
&lt;br /&gt;
== See Also ==&lt;br /&gt;
&lt;br /&gt;
* [[AMD Codenames]]&lt;/div&gt;</summary>
		<author><name>Mrothfuss</name></author>
	</entry>
	<entry>
		<id>https://15h.org/index.php?title=Family_14h&amp;diff=2881</id>
		<title>Family 14h</title>
		<link rel="alternate" type="text/html" href="https://15h.org/index.php?title=Family_14h&amp;diff=2881"/>
		<updated>2026-05-23T03:50:04Z</updated>

		<summary type="html">&lt;p&gt;Mrothfuss: /* More Information */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{{Infobox cpu family&lt;br /&gt;
  |image = BobcatDie.jpg&lt;br /&gt;
  |image_size = 300&lt;br /&gt;
  |caption = The die of a [[Bobcat]] APU&lt;br /&gt;
  |introduced = 2011&lt;br /&gt;
  |processnode = 40 nm&lt;br /&gt;
  |uarch1 = [[Bobcat]]&lt;br /&gt;
  |successor = [[Family 16h]]&lt;br /&gt;
}}&lt;br /&gt;
&lt;br /&gt;
&#039;&#039;&#039;Family 14h&#039;&#039;&#039; (also known as &#039;&#039;&#039;fam14h&#039;&#039;&#039;, or ambiguously as &#039;&#039;&#039;fam14&#039;&#039;&#039;) is a [[CPU Families Overview|family of AMD microprocessors]] corresponding to the [[Bobcat]] microarchitecture. All Family 16h processors were APUs, combining a CPU and a &amp;quot;fast-by-integrated-standards&amp;quot; GPU on a single die.&lt;br /&gt;
&lt;br /&gt;
&amp;quot;14h&amp;quot; (14-hexadecimal) is most correctly pronounced as &amp;quot;one-sixteen four&amp;quot;, but most people say &amp;quot;fourteen‑aitch&amp;quot;.&lt;br /&gt;
&lt;br /&gt;
Like other AMD family names, 14h (&amp;quot;14 hexadecimal&amp;quot;) is a mostly-arbitrary, somewhat-sequential (new processor families receive unused higher family numbers) number, returned by the x86 &amp;lt;code&amp;gt;CPUID&amp;lt;/code&amp;gt; instruction as a &amp;quot;Family number&amp;quot;, and commonly written in hexadecimal. 14 in hexadecimal corresponds to the number 20 in decimal, meaning that while &amp;quot;Family 20&amp;quot; would also be a valid, if confusing, name for these CPUs, &amp;quot;Family 14&amp;quot; could also refer to the apparently-nonexistent Family 0Eh.&lt;br /&gt;
&lt;br /&gt;
== Overview ==&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;text-align:center;&amp;quot;&lt;br /&gt;
|+&lt;br /&gt;
!&lt;br /&gt;
!Bobcat&lt;br /&gt;
|-&lt;br /&gt;
|Models&lt;br /&gt;
|00h-0Fh&lt;br /&gt;
|-&lt;br /&gt;
|Release Date&lt;br /&gt;
|2011&lt;br /&gt;
|-&lt;br /&gt;
|[[AGESA]]&lt;br /&gt;
|[https://github.com/coreboot/coreboot/commit/2b4c831b4d16b55a7abdea20bce82cccd168232c Open Source]&lt;br /&gt;
|-&lt;br /&gt;
|BKDG&lt;br /&gt;
|[https://15h.org/images/3/3d/43170_14h_Mod_00h-0Fh_BKDG_-_BIOS_and_Kernel_Developer%E2%80%99s_Guide_%28BKDG%29_for_AMD_Family_14h_Models_00h-0Fh_Processors.pdf 43170]&lt;br /&gt;
|-&lt;br /&gt;
|coreboot&lt;br /&gt;
| style=&amp;quot;background-color:#AFA&amp;quot; | [[Family_14h#coreboot_Compatible_Motherboards|Yes]]&lt;br /&gt;
|-&lt;br /&gt;
|Microcode ROM&lt;br /&gt;
|Undocumented&lt;br /&gt;
|-&lt;br /&gt;
|Microcode Patches&lt;br /&gt;
|Unencrypted&lt;br /&gt;
|-&lt;br /&gt;
|[[PSP]]&lt;br /&gt;
|No&lt;br /&gt;
|}&lt;br /&gt;
&#039;&#039;For other CPU families besides Family 14h, see [[CPU Families Overview]]&#039;&#039;&lt;br /&gt;
&lt;br /&gt;
== coreboot Compatible Motherboards ==&lt;br /&gt;
=== Bobcat ===&lt;br /&gt;
* Socket [[FT1]]&lt;br /&gt;
** [[PC Engines APU1]]&lt;br /&gt;
&lt;br /&gt;
== See Also ==&lt;br /&gt;
&lt;br /&gt;
* [[CPU Families Overview]]&lt;br /&gt;
* [[AMD Codenames]]&lt;br /&gt;
&lt;br /&gt;
== References ==&lt;/div&gt;</summary>
		<author><name>Mrothfuss</name></author>
	</entry>
	<entry>
		<id>https://15h.org/index.php?title=CPU_Families_Overview&amp;diff=2880</id>
		<title>CPU Families Overview</title>
		<link rel="alternate" type="text/html" href="https://15h.org/index.php?title=CPU_Families_Overview&amp;diff=2880"/>
		<updated>2026-05-22T23:41:36Z</updated>

		<summary type="html">&lt;p&gt;Mrothfuss: /* Family 10h / K10 */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;&lt;br /&gt;
This page gives an overview of AMD CPU families relevant to [[coreboot-15h]].&lt;br /&gt;
  &lt;br /&gt;
== List of Families ==&lt;br /&gt;
=== Family 10h ===&lt;br /&gt;
&amp;amp;nbsp;&amp;amp;nbsp;&#039;&#039;Main article: [[Family 10h]]&#039;&#039;&lt;br /&gt;
{{Excerpt|Family 10h#Overview|inline=yes|bold=yes|only=tables}}&lt;br /&gt;
&lt;br /&gt;
=== Family 12h ===&lt;br /&gt;
&amp;amp;nbsp;&amp;amp;nbsp;&#039;&#039;Main article: [[Family 12h]]&#039;&#039;&lt;br /&gt;
{{Excerpt|Family 12h#Overview|inline=yes|bold=yes|only=tables}}&lt;br /&gt;
&lt;br /&gt;
=== Family 14h ===&lt;br /&gt;
&amp;amp;nbsp;&amp;amp;nbsp;&#039;&#039;Main article: [[Family 14h]]&#039;&#039;&lt;br /&gt;
{{Excerpt|Family 14h#Overview|inline=yes|bold=yes|only=tables}}&lt;br /&gt;
&lt;br /&gt;
=== Family 15h ===&lt;br /&gt;
&amp;amp;nbsp;&amp;amp;nbsp;&#039;&#039;Main article: [[Fam15h|Family 15h]]&#039;&#039;&lt;br /&gt;
{{Excerpt|Family 15h#Overview|inline=yes|bold=yes|only=tables}}&lt;br /&gt;
&lt;br /&gt;
=== Family 16h ===&lt;br /&gt;
&amp;amp;nbsp;&amp;amp;nbsp;&#039;&#039;Main article: [[Fam16h|Family 16h]]&#039;&#039;&lt;br /&gt;
{{Excerpt|Family 16h#Overview|inline=yes|bold=yes|only=tables}}&lt;br /&gt;
&lt;br /&gt;
== External Links ==&lt;br /&gt;
[https://en.wikipedia.org/wiki/List_of_AMD_CPU_microarchitectures Wikipedia: List of AMD CPU microarchitectures]&lt;br /&gt;
&lt;br /&gt;
== References ==&lt;br /&gt;
(2014 paper) Security Analysis of x86 Processor Microcode&lt;br /&gt;
&amp;lt;ref name=&amp;quot;Security-x86&amp;quot;&amp;gt;&lt;br /&gt;
    https://www.dcddcc.com/docs/2014_paper_microcode.pdf&amp;lt;/ref&amp;gt;&lt;br /&gt;
&lt;br /&gt;
(2017 paper) Reverse Engineering x86 Processor Microcode&lt;br /&gt;
&amp;lt;ref name=&amp;quot;ReverseEngineering-x86&amp;quot;&amp;gt;&lt;br /&gt;
    https://www.usenix.org/system/files/conference/usenixsecurity17/sec17-koppe.pdf&amp;lt;/ref&amp;gt;&lt;/div&gt;</summary>
		<author><name>Mrothfuss</name></author>
	</entry>
	<entry>
		<id>https://15h.org/index.php?title=Family_10h&amp;diff=2879</id>
		<title>Family 10h</title>
		<link rel="alternate" type="text/html" href="https://15h.org/index.php?title=Family_10h&amp;diff=2879"/>
		<updated>2026-05-22T23:40:54Z</updated>

		<summary type="html">&lt;p&gt;Mrothfuss: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{{Infobox cpu family&lt;br /&gt;
  |introduced = 2007&lt;br /&gt;
  |processnode = GlobalFoundries 45 nm SOI, with early models on 65 nm SOI&lt;br /&gt;
  |uarch1 = [[K10]]&lt;br /&gt;
  |predecessor = Family 0Fh (K8)&lt;br /&gt;
  |successor = [[Family 12h]] Llano;&lt;br /&gt;
  [[Family 15h]] Bulldozer&lt;br /&gt;
}}&lt;br /&gt;
&lt;br /&gt;
&#039;&#039;&#039;Family 10h&#039;&#039;&#039; (also known as &#039;&#039;&#039;fam10h&#039;&#039;&#039;, or ambiguously as &#039;&#039;&#039;fam10&#039;&#039;&#039;) is a [[CPU Families Overview|family of AMD microprocessors]] corresponding to the [[K10|K10 microarchitecure]]. However, the K10 microarchitecture is additionally used in the Family 12h &amp;quot;Llano&amp;quot; dies.&lt;br /&gt;
&lt;br /&gt;
&amp;quot;10h&amp;quot; (10-hexadecimal) is most correctly pronounced as &amp;quot;one-sixteen zero&amp;quot;, but most people say &amp;quot;ten‑aitch&amp;quot;.&lt;br /&gt;
&lt;br /&gt;
Like other AMD family names, 10h (&amp;quot;10 hexadecimal&amp;quot;) is a mostly-arbitrary, somewhat-sequential number, returned by the &amp;lt;code&amp;gt;CPUID&amp;lt;/code&amp;gt; instruction, and commonly written in hexadecimal. &lt;br /&gt;
&lt;br /&gt;
[[File:Magny-Cours GLOBALFUNDRIES.png|thumb|Magny-Cours Silicon&amp;lt;ref&amp;gt;https://15h.org/images/d/d1/HC21.24.110.Conway-AMD-Magny-Cours.pdf&amp;lt;/ref&amp;gt;]]&lt;br /&gt;
&lt;br /&gt;
== Overview ==&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;text-align:center;&amp;quot;&lt;br /&gt;
|+&lt;br /&gt;
!&lt;br /&gt;
!K10&lt;br /&gt;
|-&lt;br /&gt;
|Release Date&lt;br /&gt;
|2007&lt;br /&gt;
|-&lt;br /&gt;
|[[AGESA]]&lt;br /&gt;
|[https://review.coreboot.org/c/coreboot/+/95 Open Source]&lt;br /&gt;
|-&lt;br /&gt;
|BKDG&lt;br /&gt;
|[https://15h.org/images/3/3f/31116_-_BIOS_and_Kernel_Developer%E2%80%99s_Guide_%28BKDG%29_For_AMD_Family_10h_Processors_%2831116%29.pdf 31116]&lt;br /&gt;
|-&lt;br /&gt;
|coreboot&lt;br /&gt;
| style=&amp;quot;background-color:#FAA&amp;quot; | No&lt;br /&gt;
|-&lt;br /&gt;
|Microcode ROM&lt;br /&gt;
|Undocumented&lt;br /&gt;
|-&lt;br /&gt;
|Microcode Patches&lt;br /&gt;
|Unencrypted&lt;br /&gt;
|-&lt;br /&gt;
|[[PSP]]&lt;br /&gt;
|No&lt;br /&gt;
|}&lt;br /&gt;
&#039;&#039;For other CPU families besides Family 10h, see [[CPU Families Overview]]&#039;&#039;&lt;br /&gt;
&lt;br /&gt;
== Microcode ==&lt;br /&gt;
&lt;br /&gt;
* (TO DO): list of microcode patches goes here&lt;br /&gt;
* (TO DO): also, list of microcode dumps from a few dies&lt;br /&gt;
&lt;br /&gt;
== Development Documentation Files and BKDG from AMD ==&lt;br /&gt;
This wiki hosts the following documens relevant for Family 10h coreboot development:&lt;br /&gt;
&lt;br /&gt;
* [[:File:31116 - BIOS and Kernel Developer’s Guide (BKDG) For AMD Family 10h Processors (31116).pdf|31116 - (BKGD) - BIOS and Kernel Developer’s Guide (BKDG) For AMD Family 10h Processors.pdf]]&lt;br /&gt;
* [[:File:41322 10h Rev Gd - Revision Guide for AMD Family 10h Processors (41322).pdf|41322 - (Family 10h) - Revision Guide for AMD Family 10h Processors.pdf]]&lt;br /&gt;
* [[:File:40546 - Software Optimization Guide for AMD Family 10h and 12h Processors (40546).pdf|40546 - Software Optimization Guide for AMD Family 10h and 12h Processors.pdf]]&lt;br /&gt;
* [[:File:43374 - AMD Family 10h Server and Workstation Processor Power and Thermal Data Sheet (43374).pdf|43374 - AMD Family 10h Server and Workstation Processor Power and Thermal Data Sheet.pdf]]&lt;br /&gt;
&lt;br /&gt;
== See Also ==&lt;br /&gt;
&lt;br /&gt;
* [[CPU Families Overview]]&lt;br /&gt;
* [[K10]]&lt;br /&gt;
&lt;br /&gt;
== References ==&lt;br /&gt;
&lt;br /&gt;
(2017 paper) Reverse Engineering x86 Processor Microcode&lt;br /&gt;
&amp;lt;ref name=&amp;quot;ReverseEngineering-x86&amp;quot;&amp;gt;&lt;br /&gt;
    https://www.usenix.org/system/files/conference/usenixsecurity17/sec17-koppe.pdf&amp;lt;/ref&amp;gt;&lt;/div&gt;</summary>
		<author><name>Mrothfuss</name></author>
	</entry>
	<entry>
		<id>https://15h.org/index.php?title=CPU_Families_Overview&amp;diff=2878</id>
		<title>CPU Families Overview</title>
		<link rel="alternate" type="text/html" href="https://15h.org/index.php?title=CPU_Families_Overview&amp;diff=2878"/>
		<updated>2026-05-22T23:33:34Z</updated>

		<summary type="html">&lt;p&gt;Mrothfuss: /* Family 0Fh / K8 */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;&lt;br /&gt;
This page gives an overview of AMD CPU families relevant to [[coreboot-15h]].&lt;br /&gt;
  &lt;br /&gt;
== List of Families ==&lt;br /&gt;
=== Family 10h / K10 ===&lt;br /&gt;
&amp;amp;nbsp;&amp;amp;nbsp;&#039;&#039;Main articles: [[Fam10h|Family 10h]] | [[K10]]&#039;&#039;&lt;br /&gt;
* Introduced: 2007/09/10 (Barcelona Opteron)&lt;br /&gt;
* CPU microcode: not encrypted&amp;lt;ref name=&amp;quot;ReverseEngineering-x86&amp;quot; /&amp;gt;, not signed, analyzed&amp;lt;ref name=&amp;quot;ReverseEngineering-x86&amp;quot; /&amp;gt;&lt;br /&gt;
* AGESA: open-sourced&amp;lt;ref&amp;gt;https://review.coreboot.org/c/coreboot/+/95&amp;lt;/ref&amp;gt;&lt;br /&gt;
* PSP: none present&lt;br /&gt;
* closed-source blobs: none required&lt;br /&gt;
&lt;br /&gt;
=== Family 12h ===&lt;br /&gt;
&amp;amp;nbsp;&amp;amp;nbsp;&#039;&#039;Main article: [[Family 12h]]&#039;&#039;&lt;br /&gt;
{{Excerpt|Family 12h#Overview|inline=yes|bold=yes|only=tables}}&lt;br /&gt;
&lt;br /&gt;
=== Family 14h ===&lt;br /&gt;
&amp;amp;nbsp;&amp;amp;nbsp;&#039;&#039;Main article: [[Family 14h]]&#039;&#039;&lt;br /&gt;
{{Excerpt|Family 14h#Overview|inline=yes|bold=yes|only=tables}}&lt;br /&gt;
&lt;br /&gt;
=== Family 15h ===&lt;br /&gt;
&amp;amp;nbsp;&amp;amp;nbsp;&#039;&#039;Main article: [[Fam15h|Family 15h]]&#039;&#039;&lt;br /&gt;
{{Excerpt|Family 15h#Overview|inline=yes|bold=yes|only=tables}}&lt;br /&gt;
&lt;br /&gt;
=== Family 16h ===&lt;br /&gt;
&amp;amp;nbsp;&amp;amp;nbsp;&#039;&#039;Main article: [[Fam16h|Family 16h]]&#039;&#039;&lt;br /&gt;
{{Excerpt|Family 16h#Overview|inline=yes|bold=yes|only=tables}}&lt;br /&gt;
&lt;br /&gt;
== External Links ==&lt;br /&gt;
[https://en.wikipedia.org/wiki/List_of_AMD_CPU_microarchitectures Wikipedia: List of AMD CPU microarchitectures]&lt;br /&gt;
&lt;br /&gt;
== References ==&lt;br /&gt;
(2014 paper) Security Analysis of x86 Processor Microcode&lt;br /&gt;
&amp;lt;ref name=&amp;quot;Security-x86&amp;quot;&amp;gt;&lt;br /&gt;
    https://www.dcddcc.com/docs/2014_paper_microcode.pdf&amp;lt;/ref&amp;gt;&lt;br /&gt;
&lt;br /&gt;
(2017 paper) Reverse Engineering x86 Processor Microcode&lt;br /&gt;
&amp;lt;ref name=&amp;quot;ReverseEngineering-x86&amp;quot;&amp;gt;&lt;br /&gt;
    https://www.usenix.org/system/files/conference/usenixsecurity17/sec17-koppe.pdf&amp;lt;/ref&amp;gt;&lt;/div&gt;</summary>
		<author><name>Mrothfuss</name></author>
	</entry>
	<entry>
		<id>https://15h.org/index.php?title=Family_14h&amp;diff=2877</id>
		<title>Family 14h</title>
		<link rel="alternate" type="text/html" href="https://15h.org/index.php?title=Family_14h&amp;diff=2877"/>
		<updated>2026-05-22T23:31:03Z</updated>

		<summary type="html">&lt;p&gt;Mrothfuss: /* Overview */&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{{Infobox cpu family&lt;br /&gt;
  |image = BobcatDie.jpg&lt;br /&gt;
  |image_size = 300&lt;br /&gt;
  |caption = The die of a [[Bobcat]] APU&lt;br /&gt;
  |introduced = 2011&lt;br /&gt;
  |processnode = 40 nm&lt;br /&gt;
  |uarch1 = [[Bobcat]]&lt;br /&gt;
  |successor = [[Family 16h]]&lt;br /&gt;
}}&lt;br /&gt;
&lt;br /&gt;
&#039;&#039;&#039;Family 14h&#039;&#039;&#039; (also known as &#039;&#039;&#039;fam14h&#039;&#039;&#039;, or ambiguously as &#039;&#039;&#039;fam14&#039;&#039;&#039;) is a [[CPU Families Overview|family of AMD microprocessors]] corresponding to the [[Bobcat]] microarchitecture. All Family 16h processors were APUs, combining a CPU and a &amp;quot;fast-by-integrated-standards&amp;quot; GPU on a single die.&lt;br /&gt;
&lt;br /&gt;
&amp;quot;14h&amp;quot; (14-hexadecimal) is most correctly pronounced as &amp;quot;one-sixteen four&amp;quot;, but most people say &amp;quot;fourteen‑aitch&amp;quot;.&lt;br /&gt;
&lt;br /&gt;
Like other AMD family names, 14h (&amp;quot;14 hexadecimal&amp;quot;) is a mostly-arbitrary, somewhat-sequential (new processor families receive unused higher family numbers) number, returned by the x86 &amp;lt;code&amp;gt;CPUID&amp;lt;/code&amp;gt; instruction as a &amp;quot;Family number&amp;quot;, and commonly written in hexadecimal. 14 in hexadecimal corresponds to the number 20 in decimal, meaning that while &amp;quot;Family 20&amp;quot; would also be a valid, if confusing, name for these CPUs, &amp;quot;Family 14&amp;quot; could also refer to the apparently-nonexistent Family 0Eh.&lt;br /&gt;
&lt;br /&gt;
== Overview ==&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot; style=&amp;quot;text-align:center;&amp;quot;&lt;br /&gt;
|+&lt;br /&gt;
!&lt;br /&gt;
!Bobcat&lt;br /&gt;
|-&lt;br /&gt;
|Models&lt;br /&gt;
|00h-0Fh&lt;br /&gt;
|-&lt;br /&gt;
|Release Date&lt;br /&gt;
|2011&lt;br /&gt;
|-&lt;br /&gt;
|[[AGESA]]&lt;br /&gt;
|[https://github.com/coreboot/coreboot/commit/2b4c831b4d16b55a7abdea20bce82cccd168232c Open Source]&lt;br /&gt;
|-&lt;br /&gt;
|BKDG&lt;br /&gt;
|[https://15h.org/images/3/3d/43170_14h_Mod_00h-0Fh_BKDG_-_BIOS_and_Kernel_Developer%E2%80%99s_Guide_%28BKDG%29_for_AMD_Family_14h_Models_00h-0Fh_Processors.pdf 43170]&lt;br /&gt;
|-&lt;br /&gt;
|coreboot&lt;br /&gt;
| style=&amp;quot;background-color:#AFA&amp;quot; | [[Family_14h#coreboot_Compatible_Motherboards|Yes]]&lt;br /&gt;
|-&lt;br /&gt;
|Microcode ROM&lt;br /&gt;
|Undocumented&lt;br /&gt;
|-&lt;br /&gt;
|Microcode Patches&lt;br /&gt;
|Unencrypted&lt;br /&gt;
|-&lt;br /&gt;
|[[PSP]]&lt;br /&gt;
|No&lt;br /&gt;
|}&lt;br /&gt;
&#039;&#039;For other CPU families besides Family 14h, see [[CPU Families Overview]]&#039;&#039;&lt;br /&gt;
&lt;br /&gt;
== coreboot Compatible Motherboards ==&lt;br /&gt;
=== Bobcat ===&lt;br /&gt;
* Socket [[FT1]]&lt;br /&gt;
** [[PC Engines APU1]]&lt;br /&gt;
&lt;br /&gt;
== More Information ==&lt;br /&gt;
* Codename: Ontario (introduced 2011), socket FT1&lt;br /&gt;
* CPU microcode: encrypted?, (not? signed?), not analyzed?&lt;br /&gt;
* AGESA: open-sourced&amp;lt;ref&amp;gt;https://github.com/coreboot/coreboot/commit/2b4c831b4d16b55a7abdea20bce82cccd168232c&amp;lt;/ref&amp;gt;&lt;br /&gt;
* PSP: none present&lt;br /&gt;
* closed-source blobs: ?&lt;br /&gt;
&lt;br /&gt;
&#039;&#039;For other CPU families besides Family 16h, see [[CPU Families Overview]]&#039;&#039;&lt;br /&gt;
&lt;br /&gt;
== See Also ==&lt;br /&gt;
&lt;br /&gt;
* [[CPU Families Overview]]&lt;br /&gt;
* [[AMD Codenames]]&lt;br /&gt;
&lt;br /&gt;
== References ==&lt;/div&gt;</summary>
		<author><name>Mrothfuss</name></author>
	</entry>
</feed>